Issued Patents All Time
Showing 25 most recent of 73 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 11171142 | Integrated circuit with vertical structures on nodes of a grid | Juergen Pille, Albert Frisch, Tobias Werner, Rolf Sautter | 2021-11-09 |
| 11164879 | Microelectronic device with a memory element utilizing stacked vertical devices | Juergen Pille, Albert Frisch, Tobias Werner, Rolf Sautter | 2021-11-02 |
| 10833089 | Buried conductive layer supplying digital circuits | Juergen Pille, Albert Frisch, Tobias Werner, Rolf Sautter | 2020-11-10 |
| 10804266 | Microelectronic device utilizing stacked vertical devices | Juergen Pille, Albert Frisch, Tobias Werner, Rolf Sautter | 2020-10-13 |
| 10529388 | Current-mode sense amplifier | Alexander Fritsch, Michael Kugel, Juergen Pille | 2020-01-07 |
| 10096346 | Current-mode sense amplifier | Alexander Fritsch, Michael Kugel, Juergen Pille | 2018-10-09 |
| 10002661 | Structure for reducing pre-charge voltage for static random-access memory arrays | Alexander Fritsch, Amira Rozenfeld, Rolf Sautter | 2018-06-19 |
| 9985032 | Selectively degrading current resistance of field effect transistor devices | Veeraraghavan S. Basker, Effendi Leobandung, Tenko Yamashita | 2018-05-29 |
| 9859280 | Selectively degrading current resistance of field effect transistor devices | Veeraraghavan S. Basker, Effendi Leobandung, Tenko Yamashita | 2018-01-02 |
| 9761286 | Current-mode sense amplifier | Alexander Fritsch, Michael Kugel, Juergen Pille | 2017-09-12 |
| 9727680 | Structure for reducing pre-charge voltage for static random-access memory arrays | Alexander Fritsch, Amira Rozenfeld, Rolf Sautter | 2017-08-08 |
| 9721049 | Structure for reducing pre-charge voltage for static random-access memory arrays | Alexander Fritsch, Amira Rozenfeld, Rolf Sautter | 2017-08-01 |
| 9721050 | Structure for reducing pre-charge voltage for static random-access memory arrays | Alexander Fritsch, Amira Rozenfeld, Rolf Sautter | 2017-08-01 |
| 9552851 | Current-mode sense amplifier | Alexander Fritsch, Michael Kugel, Juergen Pille | 2017-01-24 |
| 9543463 | Signal distribution in integrated circuit using optical through silicon via | Effendi Leobandung, James D. Warnock | 2017-01-10 |
| 9496447 | Signal distribution in integrated circuit using optical through silicon via | Effendi Leobandung, James D. Warnock | 2016-11-15 |
| 9431098 | Structure for reducing pre-charge voltage for static random-access memory arrays | Alexander Fritsch, Amira Rozenfeld, Rolf Sautter | 2016-08-30 |
| 9373550 | Selectively degrading current resistance of field effect transistor devices | Veeraraghavan S. Basker, Effendi Leobandung, Tenko Yamashita | 2016-06-21 |
| 9322848 | Ball grid array configuration for reliable testing | Otto A. Torreiter | 2016-04-26 |
| 9217758 | Ball grid array configuration for reliable testing | Otto A. Torreiter | 2015-12-22 |
| 8942052 | Complementary metal-oxide-semiconductor (CMOS) min/max voltage circuit for switching between multiple voltages | William V. Huott, Michael Kugel, Juergen Pille, Rolf Sautter | 2015-01-27 |
| 8866504 | Determining local voltage in an electronic system | Martin Eckert, Roland Frech, Otto A. Torreiter | 2014-10-21 |
| 8354858 | Apparatus and method for hardening latches in SOI CMOS devices | Ethan H. Cannon, AJ KleinOsowski, K. Paul Muller, Tak H. Ning, Philip J. Oldiges +2 more | 2013-01-15 |
| 8312069 | Permute unit and method to operate a permute unit | Tobias Gemmeke, Jens Leenstra | 2012-11-13 |
| 8136061 | Method of logic circuit synthesis and design using a dynamic circuit library | Sang Hoo Dhong, Harm Peter Hofstee, Stephen Douglas Posluszny, Joel A. Silberman, Osamu Takahashi | 2012-03-13 |