| 11881853 |
True complement dynamic circuit and method for combining binary data |
Rolf Sautter, Amira Rozenfeld, Harry Barowski |
2024-01-23 |
$16,624,000 |
| 11574695 |
Logic built-in self-test of an electronic circuit |
Alejandro Alberto Cook Lobo, Thomas Gentner, Otto A. Torreiter |
2023-02-07 |
$6,435,000 |
| 11043938 |
Digital logic circuit for deterring race violations at an array test control boundary using an inverted array clock signal feature |
Harry Barowski, Werner Juchmes, Wolfgang Penth |
2021-06-22 |
$6,016,000 |
| 10587248 |
Digital logic circuit for deterring race violations at an array test control boundary using an inverted array clock signal feature |
Harry Barowski, Werner Juchmes, Wolfgang Penth |
2020-03-10 |
$1,254,000 |
| 10529388 |
Current-mode sense amplifier |
Alexander Fritsch, Juergen Pille, Dieter Wendel |
2020-01-07 |
$1,754,000 |
| 10367481 |
Digital logic circuit for deterring race violations at an array test control boundary using an inverted array clock signal feature |
Harry Barowski, Werner Juchmes, Wolfgang Penth |
2019-07-30 |
$4,347,000 |
| 10096346 |
Current-mode sense amplifier |
Alexander Fritsch, Juergen Pille, Dieter Wendel |
2018-10-09 |
$3,566,000 |
| 9837142 |
Automated stressing and testing of semiconductor memory cells |
Yuen H. Chan, Stefan Payer, Wolfgang Penth, Juergen Pille, Tobias Werner |
2017-12-05 |
$3,039,000 |
| 9805823 |
Automated stressing and testing of semiconductor memory cells |
Yuen H. Chan, Stefan Payer, Wolfgang Penth, Juergen Pille, Tobias Werner |
2017-10-31 |
$5,356,000 |
| 9767872 |
Current-mode sense amplifier and reference current circuitry |
Alexander Fritsch, Gerhard Hellner, Rolf Sautter |
2017-09-19 |
$2,669,000 |
| 9761286 |
Current-mode sense amplifier |
Alexander Fritsch, Juergen Pille, Dieter Wendel |
2017-09-12 |
$1,776,000 |
| 9704567 |
Stressing and testing semiconductor memory cells |
Stefan Payer, Wolfgang Penth, Juergen Pille |
2017-07-11 |
$1,748,000 |
| 9627090 |
RAM at speed flexible timing and setup control |
Martin Eckert, Otto A. Torreiter, Tobias Werner |
2017-04-18 |
$1,813,000 |
| 9627017 |
RAM at speed flexible timing and setup control |
Martin Eckert, Otto A. Torreiter, Tobias Werner |
2017-04-18 |
$1,813,000 |
| 9595304 |
Current-mode sense amplifier |
Alexander Fritsch, Ulrich Krauch, Juergen Pille |
2017-03-14 |
$3,628,000 |
| 9589604 |
Single ended bitline current sense amplifier for SRAM applications |
Alexander Fritsch, Shankar Kalyanasundaram, Juergen Pille |
2017-03-07 |
$2,625,000 |
| 9564188 |
Current-mode sense amplifier and reference current circuitry |
Alexander Fritsch, Gerhard Hellner, Rolf Sautter |
2017-02-07 |
$2,910,000 |
| 9552851 |
Current-mode sense amplifier |
Alexander Fritsch, Juergen Pille, Dieter Wendel |
2017-01-24 |
$6,164,000 |
| 9431096 |
Hierarchical negative bitline boost write assist for SRAM memory devices |
Alexander Fritsch, Werner Juchmes, Rolf Sautter |
2016-08-30 |
$3,867,000 |
| 9384823 |
SRAM array comprising multiple cell cores |
Silke Penth, Raphael Polig, Tobias Werner |
2016-07-05 |
$5,294,000 |
| 8942052 |
Complementary metal-oxide-semiconductor (CMOS) min/max voltage circuit for switching between multiple voltages |
William V. Huott, Juergen Pille, Rolf Sautter, Dieter Wendel |
2015-01-27 |
$4,313,000 |
| 8918749 |
Integrated circuit schematics having imbedded scaling information for generating a design instance |
Stefan Payer, Raphael Polig, Tobias Werner |
2014-12-23 |
$3,729,000 |
| 8837235 |
Local evaluation circuit for static random-access memory |
Yuen H. Chan, Silke Penth, Tobias Werner |
2014-09-16 |
$3,547,000 |
| 8587990 |
Global bit line restore by most significant bit of an address line |
Yuen H. Chan, Raphael Polig, Tobias Werner |
2013-11-19 |
$3,686,000 |
| 7913136 |
Method for performing a logic built-in-self-test in an electronic circuit |
Tilman Gloekler, Thuyen Le, Matthias Woehrle |
2011-03-22 |
$5,211,000 |
