WP

Wolfgang Penth

IBM: 13 patents #8,581 of 70,183Top 15%
Overall (All Time): #376,356 of 4,157,543Top 10%
13
Patents All Time

Issued Patents All Time

Patent #TitleCo-InventorsDate
11043938 Digital logic circuit for deterring race violations at an array test control boundary using an inverted array clock signal feature Harry Barowski, Werner Juchmes, Michael Kugel 2021-06-22
10984843 RAM memory with pre-charging circuitry coupled to global bit-lines and method for reducing power consumption Martin Bernhard Schmidt, Harry Barowski, Simon Brandl 2021-04-20
10587248 Digital logic circuit for deterring race violations at an array test control boundary using an inverted array clock signal feature Harry Barowski, Werner Juchmes, Michael Kugel 2020-03-10
10367481 Digital logic circuit for deterring race violations at an array test control boundary using an inverted array clock signal feature Harry Barowski, Werner Juchmes, Michael Kugel 2019-07-30
9837142 Automated stressing and testing of semiconductor memory cells Yuen H. Chan, Michael Kugel, Stefan Payer, Juergen Pille, Tobias Werner 2017-12-05
9805823 Automated stressing and testing of semiconductor memory cells Yuen H. Chan, Michael Kugel, Stefan Payer, Juergen Pille, Tobias Werner 2017-10-31
9715944 Automatic built-in self test for memory arrays Lior Binyamini, Stefan Payer, Ido Rozenberg 2017-07-25
9704567 Stressing and testing semiconductor memory cells Michael Kugel, Stefan Payer, Juergen Pille 2017-07-11
9437285 Write address synchronization in 2 read/1write SRAM arrays Harry Barowski, Silke Penth, Tobias Werner 2016-09-06
9406375 Write address synchronization in 2 read/1write SRAM arrays Harry Barowski, Silke Penth, Tobias Werner 2016-08-02
8493812 Boost circuit for generating an adjustable boost voltage Osama Dengler, Alexander Fritsch, Juergen Pille 2013-07-23
8422313 Reduced power consumption memory circuitry Stefan Buettner, David A. Hrusecky, Werner Juchmes, Rolf Sautter 2013-04-16
7495949 Asymmetrical random access memory cell, memory comprising asymmetrical memory cells and method to operate such a memory Stefan Buettner, Torsten Mahnke, Otto Wagner 2009-02-24