Issued Patents All Time
Showing 1–14 of 14 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 10528323 | Circuit for addition of multiple binary numbers | Manuel Beck, Wilhelm Haller, Kurt Lind, Friedrich Schroeder | 2020-01-07 |
| 10317465 | Integrated circuit chip and a method for testing the same | Wilhelm Haller, Markus Kaltenbach, Nicolas Maeding, Christian Zoellin | 2019-06-11 |
| 10168991 | Circuit for addition of multiple binary numbers | Manuel Beck, Wilhelm Haller, Kurt Lind, Friedrich Schroeder | 2019-01-01 |
| 10006965 | Integrated circuit chip and a method for testing the same | Wilhelm Haller, Markus Kaltenbach, Nicolas Maeding, Christian Zoellin | 2018-06-26 |
| 9996656 | Detecting dispensable inverter chains in a circuit design | Kurt Lind, Friedrich Schroeder, Stefan Zimmermann | 2018-06-12 |
| 9595304 | Current-mode sense amplifier | Alexander Fritsch, Michael Kugel, Juergen Pille | 2017-03-14 |
| 9506986 | Integrated circuit chip and a method for testing the same | Wilhelm Haller, Markus Kaltenbach, Nicolas Maeding, Christian Zoellin | 2016-11-29 |
| 9058456 | Method and system to fix early mode slacks in a circuit design | Wilhelm Haller, Kurt Lind, Alexander Woerner | 2015-06-16 |
| 8612500 | Method and decimal arithmetic logic unit structure to generate a magnitude result of a mathematic | Wilhelm Haller, Guenter Mayer, Eric M. Schwarz | 2013-12-17 |
| 8522182 | Generation of an end point report for a timing simulation of an integrated circuit | Kurt Lind, Alexander Woerner | 2013-08-27 |
| 7401312 | Automatic method for routing and designing an LSI | Juergen Pille, Tobias Werner, Alexander Woerner | 2008-07-15 |
| 6668341 | Storage cell with integrated soft error detection and correction | Antje Mueller, Juergen Pille, Dieter Wendel | 2003-12-23 |
| 5944772 | Combined adder and logic unit | Juergen Haas, Wilhelm Haller, Thomas Ludwig, Holger Wetter | 1999-08-31 |
| 5928319 | Combined binary/decimal adder unit | Wilhelm Haller, Thomas Ludwig, Holger Wetter | 1999-07-27 |