Issued Patents All Time
Showing 1–9 of 9 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 10114914 | Layout effect characterization for integrated circuits | Martin Eckert, Thomas Gentner, Jens Kuenzer, Thomas Strach, Otto A. Torreiter | 2018-10-30 |
| 9904748 | Layout effect characterization for integrated circuits | Martin Eckert, Thomas Gentner, Jens Kuenzer, Thomas Strach, Otto A. Torreiter | 2018-02-27 |
| 9740813 | Layout effect characterization for integrated circuits | Martin Eckert, Thomas Gentner, Jens Kuenzer, Thomas Strach, Otto A. Torreiter | 2017-08-22 |
| 8984314 | Charge recycling between power domains of integrated circuits | Harry Barowski, Joachim Keinert, Tim Niggemeier | 2015-03-17 |
| 8972758 | Charge recycling between power domains of integrated circuits | Harry Barowski, Joachim Keinert, Tim Niggemeier | 2015-03-03 |
| 8471624 | Method for controlling the supply voltage for an integrated circuit and an apparatus with a voltage regulation module and an integrated circuit | Stefan Bonsels, Cedric Lichtenau, Thomas Pflueger, Friedrich Schroeder | 2013-06-25 |
| 7844799 | Method and system for pipeline reduction | Jens Leenstra, Juergen Pille, Dieter Wendel | 2010-11-30 |
| 6725332 | Hierarchical priority filter with integrated serialization for determining the entry with the highest priority in a buffer memory | Jens Leenstra, Juergen Pille, Dieter Wendel | 2004-04-20 |
| 6668341 | Storage cell with integrated soft error detection and correction | Ulrich Krauch, Juergen Pille, Dieter Wendel | 2003-12-23 |