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Fine resolution on-chip voltage simulation to prevent under voltage conditions |
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2023-02-21 |
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Predictive on-chip voltage simulation to detect near-future under voltage conditions |
Preetham M. Lobo, Tobias Webel |
2021-09-07 |
| 10734317 |
Discrete electronic device embedded in chip module |
Andreas Huber, Harald Huels, Stefano S. Oggioni, Thomas-Michael Winkel |
2020-08-04 |
| 10725517 |
Distributed on chip network to mitigate voltage droops |
Preetham M. Lobo, Tobias Webel |
2020-07-28 |
| 10481662 |
Distributed on chip network to mitigate voltage droops |
Preetham M. Lobo, Tobias Webel |
2019-11-19 |
| 10461715 |
Mitigating power noise using a current supply |
Martin Bernhard Schmidt, Hubert Harrer, Jochen Supper |
2019-10-29 |
| 10354946 |
Discrete electronic device embedded in chip module |
Andreas Huber, Harald Huels, Stefano S. Oggioni, Thomas-Michael Winkel |
2019-07-16 |
| 10145892 |
Increasing the resolution of on-chip measurement circuits |
Robert L. Franch, Phillip J. Restle, Christos Vezyrtzis, Scott F. Warnock |
2018-12-04 |
| 10149388 |
Method for embedding a discrete electrical device in a printed circuit board |
Bruce J. Chamberlin, Andreas Huber, Harald Huels, Thomas-Michael Winkel |
2018-12-04 |
| 10114914 |
Layout effect characterization for integrated circuits |
Martin Eckert, Thomas Gentner, Jens Kuenzer, Antje Mueller, Otto A. Torreiter |
2018-10-30 |
| 9980385 |
Discrete electronic device embedded in chip module |
Andreas Huber, Harald Huels, Stefano S. Oggioni, Thomas-Michael Winkel |
2018-05-22 |
| 9904748 |
Layout effect characterization for integrated circuits |
Martin Eckert, Thomas Gentner, Jens Kuenzer, Antje Mueller, Otto A. Torreiter |
2018-02-27 |
| 9839131 |
Embedding a discrete electrical device in a printed circuit board |
Bruce J. Chamberlin, Andreas Huber, Harald Huels, Thomas-Michael Winkel |
2017-12-05 |
| 9804231 |
Power noise histogram of a computer system |
Martin Eckert, Hubert Harrer |
2017-10-31 |
| 9740813 |
Layout effect characterization for integrated circuits |
Martin Eckert, Thomas Gentner, Jens Kuenzer, Antje Mueller, Otto A. Torreiter |
2017-08-22 |
| 9684759 |
De-coupling capacitance placement |
Harry Barowski, Joachim Keinert, Sourav Saha |
2017-06-20 |
| 9679099 |
De-coupling capacitance placement |
Harry Barowski, Joachim Keinert, Sourav Saha |
2017-06-13 |
| 9673179 |
Discrete electronic device embedded in chip module |
Andreas Huber, Harald Huels, Stefano S. Oggioni, Thomas-Michael Winkel |
2017-06-06 |
| 9146772 |
Reducing power grid noise in a processor while minimizing performance loss |
Lee Evan Eisen, Michael Stephen Floyd, Huajun Wen, Tingdong Zhou |
2015-09-29 |
| 9141421 |
Reducing power grid noise in a processor while minimizing performance loss |
Lee Evan Eisen, Michael Stephen Floyd, Huajun Wen, Tingdong Zhou |
2015-09-22 |
| 7266788 |
Via/BSM pattern optimization to reduce DC gradients and pin current density on single and multi-chip modules |
Anand Haridass, Andreas Huber, Erich Klink, Jochen Supper |
2007-09-04 |
