Issued Patents All Time
Showing 1–23 of 23 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 12057842 | Dynamic pulse generator with small propagation delay | Peter Holm, Steve Beccue | 2024-08-06 |
| 12025658 | Circuit structure to measure outliers of process variation effects | Peter Holm, Steve Beccue | 2024-07-02 |
| 11693728 | Proactive voltage droop reduction and/or mitigation in a processor core | Giora Biran, Pradip Bose, Alper Buyuktosunoglu, Pierce I-Jen Chuang, Preetham M. Lobo +3 more | 2023-07-04 |
| 11671079 | Systems and methods for concurrently driving clock pulse and clock pulse complement signals in latches of an application-specific integrated circuit | Peter Holm, Stephen Mark Beccue | 2023-06-06 |
| 11561595 | On-chip supply noise voltage reduction or mitigation using local detection loops | Pradip Bose, Alper Buyuktosunoglu, Pierce I-Jen Chuang, Phillip J. Restle | 2023-01-24 |
| 11309874 | Sequential elements with programmable feedback to program leakage in ASICs | Peter Holm, Steve Beccue | 2022-04-19 |
| 11275644 | Proactive voltage droop reduction and/or mitigation in a processor core | Giora Biran, Pradip Bose, Alper Buyuktosunoglu, Pierce I-Jen Chuang, Preetham M. Lobo +3 more | 2022-03-15 |
| 11073884 | On-chip supply noise voltage reduction or mitigation using local detection loops | Pradip Bose, Alper Buyuktosunoglu, Pierce I-Jen Chuang, Phillip J. Restle | 2021-07-27 |
| 11036276 | Mitigation of on-chip supply voltage noise by monitoring slope of supply voltage based on time-based sensors | Pierce I-Jen Chuang, Phillip J. Restle, Divya Pathak | 2021-06-15 |
| 10666415 | Determining clock signal quality using a plurality of sensors | Phillip J. Restle, James D. Warnock | 2020-05-26 |
| 10652006 | Determining clock signal quality using a plurality of sensors | Phillip J. Restle, James D. Warnock | 2020-05-12 |
| 10552250 | Proactive voltage droop reduction and/or mitigation in a processor core | Giora Biran, Pradip Bose, Alper Buyuktosunoglu, Pierce I-Jen Chuang, Preetham M. Lobo +3 more | 2020-02-04 |
| 10437311 | Mitigation of on-chip supply voltage noise by monitoring slope of supply voltage based on time-based sensors | Pierce I-Jen Chuang, Divya Pathak, Phillip J. Restle | 2019-10-08 |
| 10333520 | On-chip supply noise voltage reduction or mitigation using local detection loops in a processor core | Pradip Bose, Alper Buyuktosunoglu, Pierce I-Jen Chuang, Phillip J. Restle | 2019-06-25 |
| 10261561 | Mitigation of on-chip supply voltage based on local and non-local (neighboring) cores' supply voltage information and decision | Pierce I-Jen Chuang, Phillip J. Restle | 2019-04-16 |
| 10230360 | Increasing resolution of on-chip timing uncertainty measurements | Pawel Owczarczyk | 2019-03-12 |
| 10171081 | On-chip supply noise voltage reduction or mitigation using local detection loops in a processor core | Pradip Bose, Alper Buyuktosunoglu, Pierce I-Jen Chuang, Phillip J. Restle | 2019-01-01 |
| 10145892 | Increasing the resolution of on-chip measurement circuits | Robert L. Franch, Phillip J. Restle, Thomas Strach, Scott F. Warnock | 2018-12-04 |
| 9829535 | Test structure to measure delay variability mismatch of digital logic paths | Karthik Balakrishnan, Bruce M. Fleischer, Keith A. Jenkins | 2017-11-28 |
| 9702924 | Simultaneously measuring degradation in multiple FETs | Karthik Balakrishnan, Keith A. Jenkins | 2017-07-11 |
| 9618966 | Pulse-drive resonant clock with on-the-fly mode change | Thomas J. Bucelot, Robert L. Franch, Phillip J. Restle, David Wen-Hao Shan | 2017-04-11 |
| 9612614 | Pulse-drive resonant clock with on-the-fly mode change | Thomas J. Bucelot, Robert L. Franch, Phillip J. Restle, David Wen-Hao Shan | 2017-04-04 |
| 8788277 | Apparatus and methods for processing a signal using a fixed-point operation | Aaron Klein, Yannis Tsividis, Daniel P. Ellis | 2014-07-22 |