Issued Patents All Time
Showing 25 most recent of 85 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 11916802 | Data transmission flow control regime | Amit Shay, Avraham Ayzenfeld | 2024-02-27 |
| 11693728 | Proactive voltage droop reduction and/or mitigation in a processor core | Pradip Bose, Alper Buyuktosunoglu, Pierce I-Jen Chuang, Preetham M. Lobo, Ramon Bertran Monfort +3 more | 2023-07-04 |
| 11275644 | Proactive voltage droop reduction and/or mitigation in a processor core | Pradip Bose, Alper Buyuktosunoglu, Pierce I-Jen Chuang, Preetham M. Lobo, Ramon Bertran Monfort +3 more | 2022-03-15 |
| 11080064 | Instructions controlling access to shared registers of a multi-threaded processor | Fadi Y. Busaba, Ophir Erez, Mark S. Farrell, Lisa C. Heller, Christian Jacobi +2 more | 2021-08-03 |
| 11061680 | Instructions controlling access to shared registers of a multi-threaded processor | Fadi Y. Busaba, Ophir Erez, Mark S. Farrell, Lisa C. Heller, Christian Jacobi +2 more | 2021-07-13 |
| 10740516 | Modifying circuits to prevent redundant switching | Eli Arbel | 2020-08-11 |
| 10614183 | Reducing clock power consumption of a computer processor | Erez Barak, Amir Turi, Osher Yifrach | 2020-04-07 |
| 10585995 | Reducing clock power consumption of a computer processor | Erez Barak, Amir Turi, Osher Yifrach | 2020-03-10 |
| 10552250 | Proactive voltage droop reduction and/or mitigation in a processor core | Pradip Bose, Alper Buyuktosunoglu, Pierce I-Jen Chuang, Preetham M. Lobo, Ramon Bertran Monfort +3 more | 2020-02-04 |
| 10296687 | Reducing clock power consumption of a computer processor | Erez Barak, Amir Turi, Osher Yifrach | 2019-05-21 |
| 10175991 | Methods for the submission of accelerator commands and corresponding command structures to remote hardware accelerator engines over an interconnect link | Ilya Granovsky | 2019-01-08 |
| 9405550 | Methods for the transmission of accelerator commands and corresponding command structure to remote hardware accelerator engines over an interconnect link | Ilya Granovsky | 2016-08-02 |
| 9037770 | Accelerator engine emulation over an interconnect link | Ilya Granovsky | 2015-05-19 |
| 8983891 | Pattern matching engine for use in a pattern matching accelerator | Christoph Hagleitner, Timothy H. Heil, Russell D. Hoover, Jan Van Lunteren | 2015-03-17 |
| 8966182 | Software and hardware managed dual rule bank cache for use in a pattern matching accelerator | Christoph Hagleitner, Timothy H. Heil, Russell D. Hoover, Jan Van Lunteren | 2015-02-24 |
| 8918588 | Maintaining a cache of blocks from a plurality of data streams | Brian Mitchell Bass, Hubertus Franke, Amit Golander, Hao Yu | 2014-12-23 |
| 8839256 | Utilization of special purpose accelerators using general purpose processors | Heather D. Achilles, Amit Golander, Nancy Anne Greco | 2014-09-16 |
| 8838544 | Fast history based compression in a pipelined architecture | Amit Golander | 2014-09-16 |
| 8806292 | Method of hybrid compression acceleration utilizing special and general purpose processors | Amit Golander, Kiyoshi Nishino, Nobuyoshi Tanaka | 2014-08-12 |
| 8799188 | Algorithm engine for use in a pattern matching accelerator | Christoph Hagleitner, Timothy H. Heil, Russell D. Hoover, Jan Van Lunteren | 2014-08-05 |
| 8635180 | Multiple hash scheme for use in a pattern matching accelerator | Christoph Hagleitner, Timothy H. Heil, Jan Van Lunteren | 2014-01-21 |
| 8610604 | Compression algorithm incorporating a feedback loop for dynamic selection of a predefined Huffman dictionary | Lior Glass, Amit Golander | 2013-12-17 |
| 8610606 | Compression algorithm incorporating dynamic selection of a predefined huffman dictionary | Lior Glass, Amit Golander | 2013-12-17 |
| 8593308 | Method of accelerating dynamic Huffman decompaction within the inflate algorithm | Amit Golander, Shai I. Tahar | 2013-11-26 |
| 8495334 | Address translation for use in a pattern matching accelerator | Christoph Hagleitner, Timothy H. Heil, Jan Van Lunteren | 2013-07-23 |