Issued Patents All Time
Showing 25 most recent of 27 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 12423235 | Coherence directory way tracking in coherent agents | Amanvir Singh Sidana, Sandeep Gupta, Tom Greenshtein, Vivek Venkatraman | 2025-09-23 |
| 12326772 | Toggle-based power management | Alexander Gendler | 2025-06-10 |
| 12007901 | Memory cache with partial cache line valid states | Tom Greenshtein | 2024-06-11 |
| 11900146 | Memory controller with separate transaction table for real time transactions | Elli Bagelman | 2024-02-13 |
| 11693472 | Multi-die power management in SoCs | Doron Rajwan, Tal Kuzi, Nir Leshem, Lior Zimet | 2023-07-04 |
| 11609878 | Programmed input/output message control circuit | Sergio Kolor, Oren Bar | 2023-03-21 |
| 11586552 | Memory cache with partial cache line valid states | Tom Greenshtein | 2023-02-21 |
| 10296348 | Delayed allocation of an out-of-order queue entry and based on determining that the entry is unavailable, enable deadlock avoidance involving reserving one or more entries in the queue, and disabling deadlock avoidance based on expiration of a predetermined amount of time | Khary J. Alexander, Jonathan T. Hsieh, Christian Jacobi | 2019-05-21 |
| 10175991 | Methods for the submission of accelerator commands and corresponding command structures to remote hardware accelerator engines over an interconnect link | Giora Biran | 2019-01-08 |
| 9946588 | Structure for reducing power consumption for memory device | Gregory W. Alexander, Khary J. Alexander, Christian Jacobi, Gregory Miaskovsky, James R. Mitchell | 2018-04-17 |
| 9946589 | Structure for reducing power consumption for memory device | Gregory W. Alexander, Khary J. Alexander, Christian Jacobi, Gregory Miaskovsky, James R. Mitchell | 2018-04-17 |
| 9928075 | Load queue entry reuse for operand store compare history table update | Khary J. Alexander | 2018-03-27 |
| 9652248 | Load queue entry reuse for operand store compare history table update | Khary J. Alexander | 2017-05-16 |
| 9552312 | Executing virtual functions using memory-based data in a PCI express SR-IOV and MR-IOV environment | Avraham Ayzenfeld, Emmanuel Elder | 2017-01-24 |
| 9495167 | Load queue entry reuse for operand store compare history table update | Khary J. Alexander | 2016-11-15 |
| 9405550 | Methods for the transmission of accelerator commands and corresponding command structure to remote hardware accelerator engines over an interconnect link | Giora Biran | 2016-08-02 |
| 9086965 | PCI express error handling and recovery action controls | Etai Adar | 2015-07-21 |
| 9037770 | Accelerator engine emulation over an interconnect link | Giora Biran | 2015-05-19 |
| 9032102 | Decode data for fast PCI express multi-function device address decode | Etai Adar | 2015-05-12 |
| 8918568 | PCI express SR-IOV/MR-IOV virtual function clusters | Avraham Ayzenfeld, Emmanuel Elder | 2014-12-23 |
| 8751713 | Executing virtual functions using memory-based data in a PCI express SR-IOV and MR-IOV environment | Avraham Ayzenfeld, Emmanuel Elder | 2014-06-10 |
| 8139575 | Device, system and method of modification of PCI express packet digest | Giora Biran, Elchanan Perlin | 2012-03-20 |
| 8024597 | Signal phase verification for systems incorporating two synchronous clock domains | Etai Adar, Efrat Greenberg, Itay Poleg | 2011-09-20 |
| 7827325 | Device, system, and method of speculative packet transmission | Etai Adar, Zorik Machulsky, Paul J. Mattos | 2010-11-02 |
| 7734854 | Device, system, and method of handling transactions | Etai Adar, Michael Bar-Joshua, Shaul Yohai Yifrach | 2010-06-08 |