Patent Leaderboard
USPTO Patent Rankings Data through Dec 31, 2025
JW

James D. Warnock — 66 Patents

IBM: 64 patents #1,210 of 70,183Top 2%
Globalfoundries: 2 patents #1,397 of 4,424Top 35%
Somers, NY: #11 of 237 inventorsTop 5%
New York: #1,195 of 115,490 inventorsTop 2%
Overall (All Time): #32,599 of 4,157,543Top 1%
66 Patents All Time
James D. Warnock has been granted 66 US patents while listed as an inventor at IBM. The first was granted in 1993 and the most recent in September 2021. James D. Warnock ranks #32,599 of 4,157,543 US inventors in our database (top 0.78%). Patent records list James D. Warnock in Somers, NY, US.

Issued Patents All Time

Showing 1–25 of 66 patents

Patent #TitleCo-InventorsDateApprox Value ⓘ
11112854 Operating pulsed latches on a variable power supply Steven M. Douskey, Raghu G. GopalaKrishnaSetty, Mary P. Kusko, Hari Krishnan Rajeev 2021-09-07 $7,685,000
11074391 Characterizing and simulating library gates to enable identification and elimination of electromigration violations in semiconductor chips Leon Sigal, David Kadzov, Nagashyamala R. Dhanwada 2021-07-27 $4,187,000
10678981 Priority based circuit synthesis Vijay K. Ankenapalli, Ayan Datta, Sumitha George, Charudhattan Nagarajan 2020-06-09 $2,264,000
10666415 Determining clock signal quality using a plurality of sensors Phillip J. Restle, Christos Vezyrtzis 2020-05-26 $2,933,000
10652006 Determining clock signal quality using a plurality of sensors Phillip J. Restle, Christos Vezyrtzis 2020-05-12 $2,725,000
10565336 Pessimism reduction in cross-talk noise determination used in integrated circuit design Jason D. Morsey, Steven E. Washburn, Patrick M. Williams 2020-02-18 $2,353,000
10386912 Operating pulsed latches on a variable power supply Steven M. Douskey, Raghu G. GopalaKrishnaSetty, Mary P. Kusko, Hari Krishnan Rajeev 2019-08-20 $1,949,000
10354046 Programmable clock division methodology with in-context frequency checking Naiju K. Abdul, Jennifer E. Basile, Hemlata Gupta, Kerim Kalafala, Jeremy J. Leitzen +3 more 2019-07-16 $4,107,000
10288678 Debugging scan latch circuits using flip devices 2019-05-14 $3,761,000
10216885 Adjusting scan connections based on scan control locations Raghu G. GopalaKrishnaSetty, Ankit N. Kagliwal, Sridhar H. Rangarajan 2019-02-26 $2,499,000
10191108 On-chip sensor for monitoring active circuits on integrated circuit (IC) chips Gregory G. Freeman, Siyuranga O. Koswatta, Paul S. McLaughlin, Daniel J. Poindexter, J. Campbell Scott +2 more 2019-01-29 $16,870,000
10133840 Priority based circuit synthesis Vijay K. Ankenapalli, Ayan Datta, Sumitha George, Charudhattan Nagarajan 2018-11-20 $2,951,000
10062709 Programmable integrated circuit standard cell Ayan Datta, Ankur Shukla 2018-08-28 $3,847,000
10002881 Programmable integrated circuit standard cell Ayan Datta, Ankur Shukla 2018-06-19 $3,279,000
9990454 Early analysis and mitigation of self-heating in design flows Nagashyamala R. Dhanwada, William W. Dungan, Arun Joseph, Sungjae Lee, Arjen A. Mets +3 more 2018-06-05 $4,786,000
9985616 Programmable delay circuit including hybrid fin field effect transistors (finFETs) Vijay K. Ankenapalli, Ayan Datta, Sumitha George, Charudhattan Nagarajan 2018-05-29 $2,015,000
9934348 Adjusting scan connections based on scan control locations Raghu G. GopalaKrishnaSetty, Ankit N. Kagliwal, Sridhar H. Rangarajan 2018-04-03 $2,801,000
9910954 Programmable clock division methodology with in-context frequency checking Naiju K. Abdul, Jennifer E. Basile, Hemlata Gupta, Kerim Kalafala, Jeremy J. Leitzen +3 more 2018-03-06 $2,330,000
9891276 Performance-screen ring oscillator (PSRO) using an integrated circuit test signal distribution network 2018-02-13 $2,196,000
9762213 Initializing scannable and non-scannable latches from a common clock buffer William V. Huott, Ricardo H. Nigaglioni, Hagen Schmidt 2017-09-12 $1,776,000
9760664 Validating variation of timing constraint measurements Sachin Gupta, Vasant Rao, Suriya T. Skariah, James E. Sundquist 2017-09-12 $1,776,000
9760665 Validating variation of timing constraint measurements Sachin Gupta, Vasant Rao, Suriya T. Skariah, James E. Sundquist 2017-09-12 $1,776,000
9762212 Initializing scannable and non-scannable latches from a common clock buffer William V. Huott, Ricardo H. Nigaglioni, Hagen Schmidt 2017-09-12 $1,776,000
9720035 Performance-screen ring oscillator (PSRO) using an integrated circuit test signal distribution network 2017-08-01 $1,638,000
9664735 Debugging scan latch circuits using flip devices 2017-05-30 $1,983,000