Issued Patents All Time
Showing 1–6 of 6 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 10204823 | Enhancing robustness of SOI substrate containing a buried N+ silicon layer for CMOS processing | Stephen W. Bedell, Stephan A. Cohen, Joel P. de Souza, Karen A. Nummy, Devendra K. Sadana | 2019-02-12 |
| 10191108 | On-chip sensor for monitoring active circuits on integrated circuit (IC) chips | Gregory G. Freeman, Siyuranga O. Koswatta, Paul S. McLaughlin, J. Campbell Scott, Scott M. Taylor +2 more | 2019-01-29 |
| 9922866 | Enhancing robustness of SOI substrate containing a buried N+ silicon layer for CMOS processing | Stephen W. Bedell, Stephan A. Cohen, Joel P. de Souza, Karen A. Nummy, Devendra K. Sadana | 2018-03-20 |
| 9552455 | Method for an efficient modeling of the impact of device-level self-heating on electromigration limited current specifications | Gregory G. Freeman, Siyuranga O. Koswatta, J. Campbell Scott, Leon Sigal, James D. Warnock | 2017-01-24 |
| 9285417 | Low-voltage IC test for defect screening | James M. Crafts, Karre M. Greene, Kenneth A. Lavallee, Keith C. Stevens | 2016-03-15 |
| 4512841 | RF Coupling techniques | George F. Cunningham, Jr., John Lewis, Robert B. McClure | 1985-04-23 |