Patrick M. Williams — 17 Patents at IBM

Patrick M. Williams has been granted 17 US patents while listed as an inventor at IBM. The first was granted in 2000 and the most recent in February 2020. Patrick M. Williams ranks #263,971 of 4,157,543 US inventors in our database (top 6.3%). Patent records list Patrick M. Williams in Salt Point, NY, US.

Issued Patents All Time

Showing 1–17 of 17 patents

Patent #	Title	Co-Inventors	Date	Approx Value ⓘ
10565336	Pessimism reduction in cross-talk noise determination used in integrated circuit design	Jason D. Morsey, Steven E. Washburn, James D. Warnock	2020-02-18	$2,353,000
10552570	Pessimism reduction in hierarchical blockage aggressors using estimated resistor and capacitor values	Tsz-Mei Ko, Thomas G. Mitchell, Jason D. Morsey, Steven E. Washburn	2020-02-04	$2,135,000
10360338	Method for improving capacitance extraction performance by approximating the effect of distant shapes	Susan E. Cellier, Lewis W. Dewey, III, Anthony D. Hagin, Adam P. Matheny, Ron D. Rose +1 more	2019-07-23	$2,519,000
10254784	Using required arrival time constraints for coupled noise analysis and noise aware timing analysis of out-of-context (OOC) hierarchical entities	Jason D. Morsey, Steven E. Washburn, Michael H. Wood	2019-04-09	$2,400,000
10248753	Pessimism reduction in hierarchical blockage aggressors using estimated resistor and capacitor values	Tsz-Mei Ko, Thomas G. Mitchell, Jason D. Morsey, Steven E. Washburn	2019-04-02	$2,364,000
10169514	Approximation of resistor-capacitor circuit extraction for thread-safe design changes	Tsz-Mei Ko, Jason D. Morsey, Steven E. Washburn	2019-01-01
8239804	Method for calculating capacitance gradients in VLSI layouts using a shape processing engine	Ibrahim M. Elfadel, Lewis W. Dewey, III, Tarek A. El-Moselhy, David J. Widiger	2012-08-07	$7,112,000
7971171	Method and system for electromigration analysis on signal wiring	Joachim Keinert, Howard H. Smith	2011-06-28	$4,369,000
7743355	Method of achieving timing closure in digital integrated circuits by optimizing individual macros	Jun Zhou, David J. Hathaway, Chandramouli Visweswariah	2010-06-22	$6,664,000
7627836	OPC trimming for performance	James A. Culp, Lars Liebmann, Rajeev Malik, K. Paul Muller, Shreesh Narasimha +1 more	2009-12-01	$16,004,000
7325210	Hybrid linear wire model approach to tuning transistor widths of circuits with RC interconnect	Vasant Rao, Cindy S. Washburn, Jun Zhou, Jeffrey P. Soreff, David J. Hathaway	2008-01-29	$11,919,000
7093208	Method for tuning a digital design for synthesized random logic circuit macros in a continuous design space with optional insertion of multiple threshold voltage devices	Ee K. Cho, David J. Hathaway, Mei-Ting Hsu, Lawrence K. Lange, Gregory A. Northrop +3 more	2006-08-15	$3,598,000
7010763	Method of optimizing and analyzing selected portions of a digital integrated circuit	David J. Hathaway, Lawrence K. Lange, Chandramouli Visweswariah	2006-03-07	$6,870,000
7003747	Method of achieving timing closure in digital integrated circuits by optimizing individual macros	Jun Zhou, David J. Hathaway, Chandramouli Visweswariah	2006-02-21	$6,384,000
6629298	Automated programmable process and method for the improvement of electrical digital signal transition rates in a VLSI design	Peter J. Camporese, Adam R. Jatkowski, Leon Sigal	2003-09-30	$10,221,000
6176719	Bolted electrical connecting device for multiple electrical conductors	Rodney J. West, Daniel L. Wittmer, Glen S. O'Nan	2001-01-23
6022231	Pre-bussed rigid conduit electrical distribution system	Rodney J. West, Anthony S. Locker, Daniel G. Witt, Daniel L. Wittmer	2000-02-08

Patrick M. Williams — 17 Patents

Issued Patents All Time

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