Issued Patents All Time
Showing 1–19 of 19 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 12432936 | Capacitor integrated with memory element of memory cell | Venkatesh P. Gopinath, Joseph Versaggi, Bipul C. Paul | 2025-09-30 |
| 11635958 | Multi-port register file for partial-sum accumulation | Vivek Raj, Shashank Nemawarkar, Shivraj G. Dharne | 2023-04-25 |
| 11043418 | Middle of the line self-aligned direct pattern contacts | Jason E. Stephens, Daniel Chanemougame, Ruilong Xie, Lars Liebmann | 2021-06-22 |
| 10796056 | Optimizing library cells with wiring in metallization layers | Lionel Riviere-Cazaux, Lars Liebmann, Kai Sun, Norihito Nakamoto | 2020-10-06 |
| 10522403 | Middle of the line self-aligned direct pattern contacts | Jason E. Stephens, Daniel Chanemougame, Ruilong Xie, Lars Liebmann | 2019-12-31 |
| 9640765 | Carbon nanotube device | Lawrence A. Clevenger, Chandrasekhar Narayan, Carl Radens, Brian C. Sapp | 2017-05-02 |
| 9406888 | Carbon nanotube device | Lawrence A. Clevenger, Chandrasekhar Narayan, Carl Radens, Brian C. Sapp | 2016-08-02 |
| 9059308 | Method of manufacturing dummy gates of a different material as insulation between adjacent devices | Emre Alptekin, Viraj Y. Sardesai, Cung D. Tran | 2015-06-16 |
| 8829986 | Structure and method for integrated synaptic element | Lawrence A. Clevenger, Chandrasekhar Narayan, Carl Radens, Brian C. Sapp | 2014-09-09 |
| 8736061 | Integrated circuits having a continuous active area and methods for fabricating same | Frank Scott Johnson, Olivier Menut, Marc Tarabbia | 2014-05-27 |
| 8473885 | Physical design system and method | John M. Cohn, James A. Culp, Ulrich A. Finkler, Fook-Luen Heng, Mark A. Lavin +6 more | 2013-06-25 |
| 8423947 | Gridded glyph geometric objects (L3GO) design method | Mark A. Lavin, Thomas Ludwig, Robert T. Sayah | 2013-04-16 |
| 8219943 | Physical design system and method | John M. Cohn, James A. Culp, Ulrich A. Finkler, Fook-Luen Heng, Mark A. Lavin +6 more | 2012-07-10 |
| 7900178 | Integrated circuit (IC) design method, system and program product | James A. Culp, Ming Yin | 2011-03-01 |
| 7536664 | Physical design system and method | John M. Cohn, James A. Culp, Ulrich A. Finkler, Fook-Luen Heng, Mark A. Lavin +6 more | 2009-05-19 |
| 7260810 | Method of extracting properties of back end of line (BEOL) chip architecture | Ronald G. Filippi, Giovanni Fiorenza, Xiao Hu Liu, Conal E. Murray, Thomas M. Shaw +2 more | 2007-08-21 |
| 7093208 | Method for tuning a digital design for synthesized random logic circuit macros in a continuous design space with optional insertion of multiple threshold voltage devices | Patrick M. Williams, Ee K. Cho, David J. Hathaway, Mei-Ting Hsu, Lawrence K. Lange +3 more | 2006-08-15 |
| 7082595 | Schematic driven placement method and program product for custom VLSI circuit design | Yiu-Hing Chan, Jonathan Chu, George D. Gristede | 2006-07-25 |
| 6966046 | CMOS tapered gate and synthesis method | Brian W. Curran, Lisa Bryant Lacey, Ruchir Puri, Leon Stok | 2005-11-15 |