JW

James D. Warnock

IBM: 64 patents #1,202 of 70,183Top 2%
Globalfoundries: 2 patents #1,397 of 4,424Top 35%
📍 Somers, NY: #11 of 237 inventorsTop 5%
🗺 New York: #1,187 of 115,490 inventorsTop 2%
Overall (All Time): #32,911 of 4,157,543Top 1%
66
Patents All Time

Issued Patents All Time

Showing 51–66 of 66 patents

Patent #TitleCo-InventorsDate
7372305 Scannable dynamic logic latch circuit Hung C. Ngo, Jente B. Kuang, Dieter Wendel 2008-05-13
7225419 Methods for modeling latch transparency Erwin Behnen, Jeffrey P. Soreff, Dieter Wendel 2007-05-29
7191419 Method of timing model abstraction for circuits containing simultaneously switching internal signals Jeffrey P. Soreff 2007-03-13
7178075 High-speed level sensitive scan design test scheme with pipelined test clocks William V. Huott 2007-02-13
7165006 Scan chain disable function for power saving Sang Hoo Dhong, Joel A. Silberman, Osamu Takahashi, Dieter Wendel 2007-01-16
7084462 Parallel field effect transistor structure having a body contact George E. Smith, III 2006-08-01
7080335 Methods for modeling latch transparency Erwin Behnen, Jeffrey P. Soreff, Dieter Wendel 2006-07-18
6927615 Low skew, power efficient local clock signal generation system Sang Hoo Dhong, Joel A. Silberman, Osamu Takahashi, Dieter Wendel 2005-08-09
6922818 Method of power consumption reduction in clocked circuits Sam Gat-Shang Chu, Joachim Clabes, Michael N. Goulet, Thomas E. Rosser 2005-07-26
6901546 Enhanced debug scheme for LBIST Sam Gat-Shang Chu, Joachim Clabes, Michael N. Goulet, Johnny LeBlanc 2005-05-31
6825695 Unified local clock buffer structures Sang Hoo Dhong, Joel A. Silberman, Osamu Takahashi, Dieter Wendel 2004-11-30
6822500 Methods and apparatus for operating master-slave latches Dieter Wendel 2004-11-23
6744282 Latching dynamic logic structure, and integrated circuit including same Sang Hoo Dhong, Joel A. Silberman, Osamu Takahashi, Dieter Wendel 2004-06-01
6718523 Reduced pessimism clock gating tests for a timing analysis tool David J. Hathaway, Jeffrey P. Soreff, Neil Ray Vanderschaaf 2004-04-06
5543731 Dynamic and preset static multiplexer in front of latch circuit for use in static circuits Leon Sigal 1996-08-06
5264387 Method of forming uniformly thin, isolated silicon mesas on an insulating substrate Klaus D. Beyer, Mark A. Jaso, Subramanian S. Iyer, Scott R. Stiffler 1993-11-23