Patent Leaderboard
USPTO Patent Rankings Data through Sept 30, 2025
JL

Johnny LeBlanc — 17 Patents

IBM: 12 patents #9,222 of 70,183Top 15%
CTCook Medical Technologies: 5 patents #210 of 905Top 25%
Bloomington, IN: #53 of 943 inventorsTop 6%
Indiana: #1,882 of 33,936 inventorsTop 6%
Overall (All Time): #273,710 of 4,157,543Top 7%
17 Patents All Time

Issued Patents All Time

Showing 1–17 of 17 patents

Patent #TitleCo-InventorsDate
10639180 Systems and methods for deploying a portion of a stent using an auger-style device William J. Havel, Siddharth Vad 2020-05-05
10105245 Stent graft assembly for treating branched vessels Joel Ondersma, James A. Teague 2018-10-23
9956096 Assembly for treating branched vessels James A. Teague, Larry Remington, Joel Ondersma 2018-05-01
9655756 Systems and methods for deploying a portion of a stent using an auger-style device William J. Havel, Siddharth Vad 2017-05-23
9408689 Iliac stent graft Alex Buddery, Kelly Coverdale, Werner Dieter Ducke, Jacqui Faber, Nhi Dong Thi Nguyen-Smith +1 more 2016-08-09
8214170 Test pattern compression Patrick R. Crosby, Daniel W. Cervantes, Samuel I. Ward 2012-07-03
6901546 Enhanced debug scheme for LBIST Sam Gat-Shang Chu, Joachim Clabes, Michael N. Goulet, James D. Warnock 2005-05-31
6748563 Method and apparatus for testing path delays in a high-speed boundary scan implementation Timothy M. Skergan 2004-06-08
6665828 Globally distributed scan blocks Ravi Kumar Arimilli, Roger N. Bailey, Timothy M. Skergan 2003-12-16
6539491 Method and apparatus for implementing IEEE 1149.1 compliant boundary scan Timothy M. Skergan 2003-03-25
6452435 Method and apparatus for scanning and clocking chips with a high-speed free running clock in a manufacturing test environment Timothy M. Skergan 2002-09-17
6389577 Analyzing CMOS circuit delay Visweswara Rao Kodali, Kevin William McCauley, Salim A. Shah 2002-05-14
6240536 Scanable latch circuit and method for providing a scan output from a latch circuit Donald George Mikan, Jr. 2001-05-29
6055658 Apparatus and method for testing high speed components using low speed test apparatus Talal K. Jaber, Ronald Gene Walther 2000-04-25
5954832 Method and system for performing non-standard insitu burn-in testings 1999-09-21
5568380 Shadow register file for instruction rollback Timothy B. Brodnax, John S. Bialas, Jr., Steven A. King, Dale A. Rickard, Clark J. Spencer +1 more 1996-10-22
4852061 High density, high performance register file having improved clocking means Henry C. Baron, Thomas M. Storey, Joseph W. Yoder 1989-07-25