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Method for modeling integrated circuit yield |
Jeanne P. Bickford, Edward K. Evans, Sean Horner, Raymond J. Rosner, Andrew S. Wienick |
2006-03-14 |
| 6629276 |
Method and apparatus for a scannable hybrid flip flop |
Joseph A. Hoffman |
2003-09-30 |
| 6456138 |
Method and apparatus for a single upset (SEU) tolerant clock splitter |
Abbas Kazemzader |
2002-09-24 |
| 6448862 |
Single event upset immune oscillator circuit |
Nadim F. Haddad |
2002-09-10 |
| 6392474 |
Circuit for filtering single event effect (see) induced glitches |
Bin Li, Dave C. Lawson |
2002-05-21 |
| 4852061 |
High density, high performance register file having improved clocking means |
Henry C. Baron, Johnny LeBlanc, Thomas M. Storey |
1989-07-25 |
| 4768167 |
High speed CMOS latch with alternate data storage and test functions |
— |
1988-08-30 |
| 4621345 |
Soft error protection circuit for a storage cell |
John S. Bialas, Jr., Richard J. Daniels |
1986-11-04 |
