Issued Patents All Time
Showing 1–19 of 19 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 11657887 | Testing bit write operation to a memory array in integrated circuits | Thomas J. Knips, Uma Srinivasan, Matthew Steven Hyde, William V. Huott | 2023-05-23 |
| 11462295 | Microchip level shared array repair | Timothy Erickson Meehan, Kirk D. Peterson, John Bradley Deforge, William V. Huott, Uma Srinivasan +2 more | 2022-10-04 |
| 10998075 | Built-in self-test for bit-write enabled memory arrays | William V. Huott, Pradip Patel, Matthew Steven Hyde | 2021-05-04 |
| 10971242 | Sequential error capture during memory test | William V. Huott, Pradip Patel | 2021-04-06 |
| 10890623 | Power saving scannable latch output driver | William V. Huott, Yuen H. Chan, Pradip Patel | 2021-01-12 |
| 10593420 | Testing content addressable memory and random access memory | Harry Barowski, Sheldon B. Levenstein, Pradip Patel, Gordon B. Sapp, Rolf Sautter | 2020-03-17 |
| 10288684 | On-chip hardware-controlled window strobing | Thomas Gentner, Hagen Schmidt, Otto A. Torreiter | 2019-05-14 |
| 10281527 | On-chip hardware-controlled window strobing | Thomas Gentner, Hagen Schmidt, Otto A. Torreiter | 2019-05-07 |
| 10170199 | Testing content addressable memory and random access memory | Harry Barowski, Sheldon B. Levenstein, Pradip Patel, Gordon B. Sapp, Rolf Sautter | 2019-01-01 |
| 10079070 | Testing content addressable memory and random access memory | Harry Barowski, Sheldon B. Levenstein, Pradip Patel, Gordon B. Sapp, Rolf Sautter | 2018-09-18 |
| 9983261 | Partition-able storage of test results using inactive storage elements | William V. Huott, Thomas J. Knips, Pradip Patel | 2018-05-29 |
| 9697910 | Multi-match error detection in content addressable memory testing | William V. Huott, Pradip Patel | 2017-07-04 |
| 9627012 | Shift register with opposite shift data and shift clock directions | William V. Huott, Norman K. James, Pradip Patel | 2017-04-18 |
| 8327207 | Memory testing system | Kevin Duffy, William V. Huott, Pradip Patel | 2012-12-04 |
| 7536613 | BIST address generation architecture for multi-port memories | William V. Huott, Pradip Patel | 2009-05-19 |
| 7478297 | Merged MISR and output register without performance impact for circuits under test | Yuen H. Chan, William V. Huott, Pradip Patel | 2009-01-13 |
| 7305602 | Merged MISR and output register without performance impact for circuits under test | Yuen H. Chan, William V. Huott, Pradip Patel | 2007-12-04 |
| 7275194 | Clock duty cycle based access timer combined with standard stage clocked output register | William V. Huott, Pradip Patel | 2007-09-25 |
| 7257745 | Array self repair using built-in self test techniques | William V. Huott, Franco Motika, Pradip Patel | 2007-08-14 |