TK

Thomas J. Knips

IBM: 21 patents #5,175 of 70,183Top 8%
Overall (All Time): #205,663 of 4,157,543Top 5%
21
Patents All Time

Issued Patents All Time

Patent #TitleCo-InventorsDate
11657887 Testing bit write operation to a memory array in integrated circuits Uma Srinivasan, Daniel Rodko, Matthew Steven Hyde, William V. Huott 2023-05-23
11081202 Failing address registers for built-in self tests Uma Srinivasan, Gregory J. Fredeman, Matthew Steven Hyde, Thomas E. Miller 2021-08-03
11069422 Testing multi-port array in integrated circuits Matthew Steven Hyde, Uma Srinivasan, Gregory J. Fredeman 2021-07-20
9983261 Partition-able storage of test results using inactive storage elements William V. Huott, Pradip Patel, Daniel Rodko 2018-05-29
9355746 Built-in testing of unused element on chip Luiz C. Alves, William J. Clarke, Christopher R. Conklin, William V. Huott, Kevin W. Kark +1 more 2016-05-31
9136019 Built-in testing of unused element on chip Luiz C. Alves, William J. Clarke, Christopher R. Conklin, William V. Huott, Kevin W. Kark +1 more 2015-09-15
7930601 AC ABIST diagnostic method, apparatus and program product Joseph Eckelman, Donato O. Forlenza, Orazio P. Forlenza, William J. Hurley, Gary W. Maier +1 more 2011-04-19
7793173 Efficient memory product for test and soft repair of SRAM with redundancy Tom Chang, William V. Huott, Donald W. Plass 2010-09-07
7529997 Method for self-correcting cache using line delete, data logging, and fuse repair correction Patrick J. Meaney, William V. Huott, David J. Lund, Bryan L. Mechtly, Pradip Patel 2009-05-05
7437626 Efficient method of test and soft repair of SRAM with redundancy Tom Chang, William V. Huott, Donald W. Plass 2008-10-14
7380191 ABIST data compression and serialization for memory built-in self test of SRAM with redundancy James Dawson, Donald W. Plass, Kenneth J. Reyer 2008-05-27
7219275 Method and apparatus for providing flexible modular redundancy allocation for memory built in self test of SRAM with redundancy Tom Chang, William V. Huott, Donald W. Plass 2007-05-15
7210084 Integrated system logic and ABIST data compression for an SRAM directory Paul A. Bunce, John D. Davis, Donald W. Plass 2007-04-24
7170320 Fast pulse powered NOR decode apparatus with pulse stretching and redundancy steering James Dawson, Donald W. Plass, Kenneth J. Reyer 2007-01-30
7076706 Method and apparatus for ABIST diagnostics Joseph Eckelman 2006-07-11
7076710 Non-binary address generation for ABIST Tom Chang, James Dawson, Douglas J. Malone 2006-07-11
7073105 ABIST address generation James Dawson, John D. Davis, Douglas J. Malone 2006-07-04
7068554 Apparatus and method for implementing multiple memory redundancy with delay tracking clock James Dawson, Donald W. Plass, Kenneth J. Reyer 2006-06-27
7064990 Method and apparatus for implementing multiple column redundancy for memory James Dawson, Donald W. Plass, Kenneth J. Reyer 2006-06-20
7009895 Method for skip over redundancy decode with very low overhead Paul A. Bunce, John D. Davis, Donald W. Plass 2006-03-07
6584023 System for implementing a column redundancy scheme for arrays with controls that span multiple data bits Paul A. Bunce, John D. Davis, Donald W. Plass 2003-06-24