Issued Patents All Time
Showing 1–9 of 9 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 11263151 | Dynamic translation lookaside buffer (TLB) invalidation using virtually tagged cache for load/store operations | David Campbell, Bryan Lloyd, David A. Hrusecky, Kimberly M. Fernsler, Jeffrey A. Stuecheli +4 more | 2022-03-01 |
| 7827443 | Processor instruction retry recovery | Susan E. Eisen, Hung Q. Le, Dung Q. Nguyen, Jose Angel Paredes, Scott Barnett Swaney | 2010-11-02 |
| 7603497 | Method and apparatus to launch write queue read data in a microprocessor recovery unit | Kenneth L. Ward | 2009-10-13 |
| 7526583 | Method and apparatus to launch write queue read data in a microprocessor recovery unit | Kenneth L. Ward | 2009-04-28 |
| 7478276 | Method for checkpointing instruction groups with out-of-order floating point instructions in a multi-threaded processor | James Wilson Bishop, Hung Q. Le, Jafar Nahidi, Dung Q. Nguyen, Jose Angel Paredes +2 more | 2009-01-13 |
| 7467325 | Processor instruction retry recovery | Susan E. Eisen, Hung Q. Le, Dung Q. Nguyen, Jose Angel Paredes, Scott Barnett Swaney | 2008-12-16 |
| 7409589 | Method and apparatus for reducing number of cycles required to checkpoint instructions in a multi-threaded processor | Kenneth L. Ward | 2008-08-05 |
| 7200742 | System and method for creating precise exceptions | Fadi Y. Busaba, John G. Rell, Jr., Eric M. Schwarz, Chung-Lung K. Shum, Timothy J. Slegel +2 more | 2007-04-03 |
| 5386531 | Computer system accelerator for multi-word cross-boundary storage access | Bartholomew Blaner, Raymond J. Eberhard, Thomas L. Jeremiah | 1995-01-31 |