| 8521982 |
Load request scheduling in a cache hierarchy |
Robert Alan Cargnoni, Guy L. Guthrie, Stephen J. Powell, William J. Starke, Jeffrey A. Steucheli |
2013-08-27 |
| 8347037 |
Victim cache replacement |
Guy L. Guthrie, William L. McNeil, Piyush C. Patel, William J. Starke, Jeffrey A. Stuecheli |
2013-01-01 |
| 8327072 |
Victim cache replacement |
Guy L. Guthrie, William J. Starke, Phillip G. Williams |
2012-12-04 |
| 8327073 |
Empirically based dynamic control of acceptance of victim cache lateral castouts |
Guy L. Guthrie, Harmony L. Helterhoff, Alvan W. Ng, William J. Starke, Jeffrey A. Stuecheli +1 more |
2012-12-04 |
| 8166246 |
Chaining multiple smaller store queue entries for more efficient store queue usage |
Guy L. Guthrie, William L. McNeil, Hugh Shen, William J. Starke |
2012-04-24 |
| 8117397 |
Victim cache line selection |
Guy L. Guthrie, William L. McNeil, Piyush C. Patel, William J. Starke, Jeffrey A. Stuecheli |
2012-02-14 |
| 7484052 |
Distributed address arbitration scheme for symmetrical multiprocessor system |
Brian Mitchell Bass, Charles Ray Johns, David Shippy, Thuong Quang Truong |
2009-01-27 |
| 6829702 |
Branch target cache and method for efficiently obtaining target path instructions for tight program loops |
Charles R. Moore |
2004-12-07 |
| 5940877 |
Cache address generation with and without carry-in |
Richard J. Eickemeyer |
1999-08-17 |
| 5909694 |
Multiway associative external microprocessor cache |
Steven Lee Gregor |
1999-06-01 |
| 5701430 |
Cross-cache-line compounding algorithm for scism processors |
Bartholomew Blaner |
1997-12-23 |
| 5504932 |
System for executing scalar instructions in parallel based on control bits appended by compounding decoder |
Stamatis Vassiliadis, Bartholomew Blaner |
1996-04-02 |
| 5446850 |
Cross-cache-line compounding algorithm for scism processors |
Bartholomew Blaner |
1995-08-29 |
| 5398321 |
Microcode generation for a scalable compound instruction set machine |
— |
1995-03-14 |
| 5386531 |
Computer system accelerator for multi-word cross-boundary storage access |
Bartholomew Blaner, Raymond J. Eberhard, Michael J. Mack |
1995-01-31 |
| 5303356 |
System for issuing instructions for parallel execution subsequent to branch into a group of member instructions with compoundability in dictation tag |
Stamatis Vassiliadis, Bartholomew Blaner |
1994-04-12 |
| 5287467 |
Pipeline for removing and concurrently executing two or more branch instructions in synchronization with other instructions executing in the execution unit |
Bartholomew Blaner, Stamatis Vassiliadis, Phillip G. Williams |
1994-02-15 |
| 5039939 |
Calculating AC chip performance using the LSSD scan path |
Carroll J. Dick, Bruce J. Ditmyer, Lawrence W. Jones, Gregory S. Still |
1991-08-13 |
| 4234955 |
Parity for computer system having an array of external registers |
Karl F. Pezdirtz |
1980-11-18 |