Issued Patents All Time
Showing 1–10 of 10 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 8489863 | Processor including age tracking of issue queue instructions | James Wilson Bishop, Mary D. Brown, Jeffrey C. Brownscheidle, Robert A. Cordes, Maureen A. Delaney +2 more | 2013-07-16 |
| 8380964 | Processor including age tracking of issue queue instructions | James Wilson Bishop, Mary D. Brown, Jeffrey C. Brownscheidle, Robert A. Cordes, Maureen A. Delaney +2 more | 2013-02-19 |
| 8356267 | Statistical method for hierarchically routing layout utilizing flat route information | Vikas Agarwal, Yonatan Mittlefehldt | 2013-01-15 |
| 8127116 | Dependency matrix with reduced area and power consumption | Saiful Islam, Mary D. Brown, Bjorn P. Christensen, Sam Gat-Shang Chu, Robert A. Cordes +2 more | 2012-02-28 |
| 7663963 | Apparatus and method for providing multiple reads/writes using a 2Read/2Write register file array | Sam Gat-Shang Chu, Maureen A. Delaney, Saiful Islam, Dung Q. Nguyen | 2010-02-16 |
| 7478276 | Method for checkpointing instruction groups with out-of-order floating point instructions in a multi-threaded processor | James Wilson Bishop, Hung Q. Le, Michael J. Mack, Dung Q. Nguyen, Jose Angel Paredes +2 more | 2009-01-13 |
| 7400548 | Method for providing multiple reads/writes using a 2read/2write register file array | Sam Gat-Shang Chu, Maureen A. Delaney, Saiful Islam, Dung Q. Nguyen | 2008-07-15 |
| 7254697 | Method and apparatus for dynamic modification of microprocessor instruction group at dispatch | James Wilson Bishop, Hung Q. Le, Dung Q. Nguyen, Brian W. Thompto | 2007-08-07 |
| 7243170 | Method and circuit for reading and writing an instruction buffer | Taqi Nasser Buti, Brian W. Curran, Maureen A. Delaney, Saiful Islam, Zakaria Mahmood Khwaja +1 more | 2007-07-10 |
| 7243209 | Apparatus and method for speeding up access time of a large register file with wrap capability | Sam Gat-Shang Chu, Maureen A. Delaney, Saiful Islam, Dung Q. Nguyen | 2007-07-10 |