Issued Patents All Time
Showing 1–15 of 15 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 7243170 | Method and circuit for reading and writing an instruction buffer | Brian W. Curran, Maureen A. Delaney, Saiful Islam, Zakaria Mahmood Khwaja, Jafar Nahidi +1 more | 2007-07-10 |
| 6791363 | Multistage, single-rail logic circuitry and method therefore | Matthew J. Amatangelo, Christopher McCall Durham, Peter Juergen Klim | 2004-09-14 |
| 6480931 | Content addressable storage apparatus and register mapper architecture | Peter Juergen Klim, Hung Q. Le, Robert G. McDonald | 2002-11-12 |
| 6421758 | Method and system for super-fast updating and reading of content addressable memory with a bypass circuit | — | 2002-07-16 |
| 5962895 | SOI transistor having a self-aligned body contact | Klaus D. Beyer, Chang-Ming Hsieh, Louis L. Hsu | 1999-10-05 |
| 5872733 | Ramp-up rate control circuit for flash memory charge pump | Louis L. Hsu, Jente B. Kuang, Somnuk Ratanaphanyarat, Mary J. Saccamango, Hyun Jong Shin | 1999-02-16 |
| 5736891 | Discharge circuit in a semiconductor memory | Louis L. Hsu, Jente B. Kuang, Somnuk Ratanaphanyarat, Mary J. Saccamango, Hyun Jong Shin | 1998-04-07 |
| 5729039 | SOI transistor having a self-aligned body contact | Klaus D. Beyer, Chang-Ming Hsieh, Louis L. Hsu | 1998-03-17 |
| 5666320 | Storage system | Robert C. Wong, Seiki Ogura | 1997-09-09 |
| 5661684 | Differential sense amplifier | Robert C. Wong, Seiki Ogura | 1997-08-26 |
| 5405795 | Method of forming a SOI transistor having a self-aligned body contact | Klaus D. Beyer, Chang-Ming Hsieh, Louis L. Hsu | 1995-04-11 |
| 5382832 | Semiconductor device and wafer structure having a planar buried interconnect by wafer bonding | Louis L. Hsu, Rajiv V. Joshi, Joseph F. Shepard, Jr. | 1995-01-17 |
| 5318663 | Method for thinning SOI films having improved thickness uniformity | Joseph F. Shepard, Jr. | 1994-06-07 |
| 5260233 | Semiconductor device and wafer structure having a planar buried interconnect by wafer bonding | Louis L. Hsu, Rajiv V. Joshi, Joseph F. Shepard, Jr. | 1993-11-09 |
| 5258318 | Method of forming a BiCMOS SOI wafer having thin and thick SOI regions of silicon | Louis L. Hsu, Mark E. Jost, Seiki Ogura, Ronald N. Schulz | 1993-11-02 |