Issued Patents All Time
Showing 25 most recent of 54 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 10109264 | Composing music using foresight and planning | Alyson T. Cabral, Richard B. Daskas, Janani Mukundan | 2018-10-23 |
| 9799312 | Composing music using foresight and planning | Alyson T. Cabral, Richard B. Daskas, Janani Mukundan | 2017-10-24 |
| 8729549 | Test structure and methodology for three-dimensional semiconductor structures | Kerry Bernstein, Jerome L. Cann, Paul D. Kartschoke, Peter Juergen Klim, Donald L. Wheater | 2014-05-20 |
| 8294149 | Test structure and methodology for three-dimensional semiconductor structures | Kerry Bernstein, Jerome L. Cann, Paul D. Kartschoke, Peter Juergen Klim, Donald L. Wheater | 2012-10-23 |
| 8196073 | Structure for reduced area active above-ground and below-supply noise suppression circuits | Rafik F. Dagher, Peter Juergen Klim | 2012-06-05 |
| 8010932 | Structure for automated transistor tuning in an integrated circuit design | Peter Juergen Klim, Robert N. Krentler | 2011-08-30 |
| 7693701 | Structure for a configurable low power high fan-in multiplexer | Owen Chiang, Peter Juergen Klim, James D. Warnock | 2010-04-06 |
| 7633316 | Transmission gate multiplexer | Owen Chiang, Peter Juergen Klim, Robert N. Krentler, James D. Warnock | 2009-12-15 |
| 7605612 | Techniques for reducing power requirements of an integrated circuit | Owen Chiang, Peter Juergen Klim, Daniel Stasiak, Albert J. Van Norstrand, Jr. | 2009-10-20 |
| 7511529 | Reduced area active above-ground and below-supply noise suppression circuits | Rafik F. Dagher, Peter Juergen Klim | 2009-03-31 |
| 7466164 | Method and apparatus for a configurable low power high fan-in multiplexer | Owen Chiang, Peter Juergen Klim, James D. Warnock | 2008-12-16 |
| 7466165 | Transmission gate multiplexer | Owen Chiang, Peter Juergen Klim, Robert N. Krentler, James D. Warnock | 2008-12-16 |
| 6832277 | Method and apparatus for transmitting data that utilizes delay elements to reduce capacitive coupling | Parsotam T. Patel | 2004-12-14 |
| 6791363 | Multistage, single-rail logic circuitry and method therefore | Matthew J. Amatangelo, Taqi Nasser Buti, Peter Juergen Klim | 2004-09-14 |
| 6785826 | Self power audit and control circuitry for microprocessor functional units | Peter Juergen Klim | 2004-08-31 |
| 6654937 | Register file timing using static timing tools | Matthew J. Amatangelo, Peter Juergen Klim | 2003-11-25 |
| 6650592 | Data processing system, method, and product for automatically performing timing checks on a memory cell using a static timing tool | Matthew J. Amatangelo, Peter Juergen Klim | 2003-11-18 |
| 6577152 | Noise suppression circuit for suppressing above-ground noises | Peter Juergen Klim | 2003-06-10 |
| 6532574 | Post-manufacture signal delay adjustment to solve noise-induced delay variations | Sharad Mehrotra, Alexander K. Spencer, Barry Duane Williamson | 2003-03-11 |
| 6522170 | Self-timed CMOS static logic circuit | Peter Juergen Klim | 2003-02-18 |
| 6507929 | System and method for diagnosing and repairing errors in complementary logic | Peter Juergen Klim, Ronald Gene Walther | 2003-01-14 |
| 6502220 | Complementary logic error detection and correction | Peter Juergen Klim | 2002-12-31 |
| 6445236 | Master-slave flip-flop circuit with embedded hold function and method for holding data in a master-slave flip-flop circuit | Jennifer Michelle Bernard, Peter Juergen Klim, Donald George Mikan, Jr. | 2002-09-03 |
| 6406980 | Physical design technique providing single and multiple core microprocessor chips in a single design cycle and manufacturing lot using shared mask sets | Matthew J. Amatangelo, Peter Juergen Klim, Stephen L. Runyon | 2002-06-18 |
| 6285217 | Dynamic logic circuits with reduced evaluation time | Peter Juergen Klim, Younes Lofti, John Andrew Beck | 2001-09-04 |