PK

Paul D. Kartschoke

IBM: 41 patents #2,268 of 70,183Top 4%
Globalfoundries: 2 patents #1,397 of 4,424Top 35%
Overall (All Time): #70,889 of 4,157,543Top 2%
43
Patents All Time

Issued Patents All Time

Showing 25 most recent of 43 patents

Patent #TitleCo-InventorsDate
9256705 Reducing repeater power Adam P. Matheny, Jose L. Neves 2016-02-09
9223918 Reducing repeater power Adam P. Matheny, Jose L. Neves 2015-12-29
8729549 Test structure and methodology for three-dimensional semiconductor structures Kerry Bernstein, Jerome L. Cann, Christopher McCall Durham, Peter Juergen Klim, Donald L. Wheater 2014-05-20
8689152 Double-sided integrated circuit chips Kerry Bernstein, Timothy J. Dalton, Jeffrey P. Gambino, Mark D. Jaffe, Stephen E. Luce +1 more 2014-04-01
8471306 Double-sided integrated circuit chips Kerry Bernstein, Timothy J. Dalton, Jeffrey P. Gambino, Mark D. Jaffe, Stephen E. Luce +1 more 2013-06-25
8421126 Double-sided integrated circuit chips Kerry Bernstein, Timothy J. Dalton, Jeffrey P. Gambino, Mark D. Jaffe, Stephen E. Luce +1 more 2013-04-16
8294149 Test structure and methodology for three-dimensional semiconductor structures Kerry Bernstein, Jerome L. Cann, Christopher McCall Durham, Peter Juergen Klim, Donald L. Wheater 2012-10-23
8146046 Structures for semiconductor structures with error detection and correction Timothy J. Dalton, Marc R. Faucher, Peter A. Sandon 2012-03-27
8013342 Double-sided integrated circuit chips Kerry Bernstein, Timothy J. Dalton, Jeffrey P. Gambino, Mark D. Jaffe, Stephen E. Luce +1 more 2011-09-06
7989312 Double-sided integrated circuit chips Kerry Bernstein, Timothy J. Dalton, Jeffrey P. Gambino, Mark D. Jaffe, Stephen E. Luce +1 more 2011-08-02
7960245 Dual wired integrated circuit chips Kerry Bernstein, Timothy J. Dalton, Jeffrey P. Gambino, Mark D. Jaffe, Anthony K. Stamper 2011-06-14
7939914 Dual wired integrated circuit chips Kerry Bernstein, Timothy J. Dalton, Jeffrey P. Gambino, Mark D. Jaffe, Anthony K. Stamper 2011-05-10
7886253 Design structure for performing iterative synthesis of an integrated circuit design to attain power closure Steven E. Charlebois, John J. Reilly, Manikandan Viswanath 2011-02-08
7873923 Power gating logic cones Steven E. Charlebois, John J. Reilly, Manikandan Viswanath 2011-01-18
7836418 Method and system for achieving power optimization in a hierarchical netlist William A. Binder, Christopher Gonzalez, Sherwin C. Murphy, Jr. 2010-11-16
7670927 Double-sided integrated circuit chips Kerry Bernstein, Timothy J. Dalton, Jeffrey P. Gambino, Mark D. Jaffe, Stephen E. Luce +1 more 2010-03-02
7642813 Error correcting logic system Kerry Bernstein, Philip G. Emma, John A. Fifield, William A. Klaasen, Norman J. Rohrer 2010-01-05
7539968 Iterative synthesis of an integrated circuit design for attaining power closure while maintaining existing design constraints Steven E. Charlebois, John J. Reilly, Manikandan Viswanath 2009-05-26
7526698 Error detection and correction in semiconductor structures Timothy J. Dalton, Marc R. Faucher, Peter A. Sandon 2009-04-28
7480810 Voltage droop dynamic recovery Christopher Gonzalez, Vinod Ramadurai, Mathew I. Ringler 2009-01-20
7471115 Error correcting logic system Kerry Bernstein, Philip G. Emma, John A. Fifield, William A. Klaasen, Norman J. Rohrer 2008-12-30
7381627 Dual wired integrated circuit chips Kerry Bernstein, Timothy J. Dalton, Jeffrey P. Gambino, Mark D. Jaffe, Anthony K. Stamper 2008-06-03
7336102 Error correcting logic system Kerry Bernstein, Philip G. Emma, John A. Fifield, William A. Klaasen, Norman J. Rohrer 2008-02-26
7285477 Dual wired integrated circuit chips Kerry Bernstein, Timothy J. Dalton, Jeffrey P. Gambino, Mark D. Jaffe, Anthony K. Stamper 2007-10-23
7249358 Method and apparatus for dynamically allocating processors Philip G. Emma, Allen Haar, Barry W. Krumm, Norman J. Rohrer, Peter A. Sandon 2007-07-24