Issued Patents All Time
Showing 25 most recent of 31 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 12373215 | Using a next fetch predictor circuit with short branches and return fetch groups | Niket K. Choudhary, Ethan Schuchman, Ronald P. Hall, Ian D. Kountanis, Douglas C. Holman +3 more | 2025-07-29 |
| 11880308 | Prediction confirmation for cache subsystem | Ronald P. Hall, Balaji Kadambi, Mahesh K. Reddy | 2024-01-23 |
| 11635961 | Processor for avoiding reduced performance using instruction metadata to determine not to maintain a mapping of a logical register to a physical register in a first level register file | Christopher M. Abernathy, Dung Q. Nguyen | 2023-04-25 |
| 11487667 | Prediction confirmation for cache subsystem | Ronald P. Hall, Balaji Kadambi, Mahesh K. Reddy | 2022-11-01 |
| 11256507 | Thread transition management | Christopher M. Abernathy, Susan E. Eisen, James Allan Kahle, Hung Q. Le, Dung Q. Nguyen | 2022-02-22 |
| 10296339 | Thread transition management | Christopher M. Abernathy, Susan E. Eisen, James Allan Kahle, Hung Q. Le, Dung Q. Nguyen | 2019-05-21 |
| 10275251 | Processor for avoiding reduced performance using instruction metadata to determine not to maintain a mapping of a logical register to a physical register in a first level register file | Christopher M. Abernathy, Dung Q. Nguyen | 2019-04-30 |
| 10055226 | Thread transition management | Christopher M. Abernathy, Susan E. Eisen, James Allan Kahle, Hung Q. Le, Dung Q. Nguyen | 2018-08-21 |
| 10007616 | Methods for core recovery after a cold start | Brett S. Feero, David Williamson, Jonathan J. Tyler | 2018-06-26 |
| 9959121 | Bypassing a higher level register file in a processor having a multi-level register file and a set of bypass registers | Christopher M. Abernathy, Sundeep Chadha, Dung Q. Nguyen | 2018-05-01 |
| 9703561 | Thread transition management | Christopher M. Abernathy, Susan E. Eisen, James Allan Kahle, Hung Q. Le, Dung Q. Nguyen | 2017-07-11 |
| 9286068 | Efficient usage of a multi-level register file utilizing a register file bypass | Christopher M. Abernathy, Sundeep Chadha, Dung Q. Nguyen | 2016-03-15 |
| 8725993 | Thread transition management | Christopher M. Abernathy, Susan E. Eisen, James Allan Kahle, Hung Q. Le, Dung Q. Nguyen | 2014-05-13 |
| 8661227 | Multi-level register file supporting multiple threads | Christopher M. Abernathy, Hung Q. Le, Dung Q. Nguyen | 2014-02-25 |
| 8661228 | Multi-level register file supporting multiple threads | Christopher M. Abernathy, Hung Q. Le, Dung Q. Nguyen | 2014-02-25 |
| 8631223 | Register file supporting transactional processing | Christopher M. Abernathy, Hung Q. Le, Dung Q. Nguyen | 2014-01-14 |
| 8489863 | Processor including age tracking of issue queue instructions | James Wilson Bishop, Jeffrey C. Brownscheidle, Robert A. Cordes, Maureen A. Delaney, Jafar Nahidi +2 more | 2013-07-16 |
| 8380964 | Processor including age tracking of issue queue instructions | James Wilson Bishop, Jeffrey C. Brownscheidle, Robert A. Cordes, Maureen A. Delaney, Jafar Nahidi +2 more | 2013-02-19 |
| 8239661 | System and method for double-issue instructions using a dependency matrix | Christopher M. Abernathy, Todd A. Venton | 2012-08-07 |
| 8135942 | System and method for double-issue instructions using a dependency matrix and a side issue queue | Christopher M. Abernathy, Todd A. Venton, John B. Griswell, Jr. | 2012-03-13 |
| 8127116 | Dependency matrix with reduced area and power consumption | Saiful Islam, Bjorn P. Christensen, Sam Gat-Shang Chu, Robert A. Cordes, Maureen A. Delaney +2 more | 2012-02-28 |
| 8108655 | Selecting fixed-point instructions to issue on load-store unit | Christopher M. Abernathy, James Wilson Bishop, William E. Burky, Robert A. Cordes, Hung Q. Le +2 more | 2012-01-31 |
| 8103852 | Information handling system including a processor with a bifurcated issue queue | James Wilson Bishop, William E. Burky, Todd A. Venton | 2012-01-24 |
| 8099582 | Tracking deallocated load instructions using a dependence matrix | Christopher M. Abernathy, William E. Burky, Todd A. Venton | 2012-01-17 |
| 8086826 | Dependency tracking for enabling successive processor instructions to issue | William E. Burky, Dung Q. Nguyen, Balaram Sinharoy | 2011-12-27 |