| 10552323 |
Cache flush method and apparatus |
Ronald P. Hall, Jonathan Y. Tong, David E. Kroesche |
2020-02-04 |
$97,170,000 |
| 9519480 |
Branch target preloading using a multiplexer and hash circuit to reduce incorrect branch predictions |
Gregory W. Alexander, Anton Blanchard, Milton Devon Miller, II, Kenneth L. Wright |
2016-12-13 |
$6,265,000 |
| 9395992 |
Instruction swap for patching problematic instructions in a microprocessor |
Richard W. Doing, Ronald P. Hall, Kevin N. Magill, James O. Tingen |
2016-07-19 |
$4,161,000 |
| 9134966 |
Management of mixed programming languages for a simulation environment |
Bishop Brock, John Farrugia, Andreas C. Koenig, Jeshua Daniel Smith |
2015-09-15 |
$3,796,000 |
| 8296739 |
Testing soft error rate of an application program |
Ronald Nick Kalla, Jeffrey William Kellington, Naoko Pia Sanda |
2012-10-23 |
$6,526,000 |
| 8239661 |
System and method for double-issue instructions using a dependency matrix |
Christopher M. Abernathy, Mary D. Brown |
2012-08-07 |
$7,112,000 |
| 8135942 |
System and method for double-issue instructions using a dependency matrix and a side issue queue |
Christopher M. Abernathy, Mary D. Brown, John B. Griswell, Jr. |
2012-03-13 |
$7,610,000 |
| 8131980 |
Structure for dynamic livelock resolution with variable delay memory access queue |
Ronald P. Hall, Michael L. Karm, Alvan W. Ng |
2012-03-06 |
$5,131,000 |
| 8108655 |
Selecting fixed-point instructions to issue on load-store unit |
Christopher M. Abernathy, James Wilson Bishop, Mary D. Brown, William E. Burky, Robert A. Cordes +2 more |
2012-01-31 |
$4,013,000 |
| 8103852 |
Information handling system including a processor with a bifurcated issue queue |
James Wilson Bishop, Mary D. Brown, William E. Burky |
2012-01-24 |
$7,514,000 |
| 8099582 |
Tracking deallocated load instructions using a dependence matrix |
Christopher M. Abernathy, Mary D. Brown, William E. Burky |
2012-01-17 |
$12,258,000 |
| 8078999 |
Structure for implementing speculative clock gating of digital logic circuits |
Bartholomew Blaner, Mary D. Brown, William E. Burky |
2011-12-13 |
$19,280,000 |
| 8037366 |
Issuing instructions in-order in an out-of-order processor using false dependencies |
Christopher M. Abernathy, Mary D. Brown, Dung Q. Nguyen |
2011-10-11 |
$5,277,000 |
| 8020072 |
Method and apparatus for correcting data errors |
Christopher M. Abernathy |
2011-09-13 |
$4,804,000 |
| 7991979 |
Issuing load-dependent instructions in an issue queue in a processing unit of a data processing system |
Christopher M. Abernathy, Mary D. Brown, William E. Burky |
2011-08-02 |
$4,890,000 |
| 7971161 |
Apparatus and method for implementing speculative clock gating of digital logic circuits |
Bartholomew Blaner, Mary D. Brown, William E. Burky |
2011-06-28 |
$4,369,000 |
| 7823028 |
Low-level console interface |
Anton Blanchard, Milton Devon Miller, II |
2010-10-26 |
$4,266,000 |
| 7805636 |
Bootable post crash analysis environment |
Anton Blanchard, Milton Devon Miller, II |
2010-09-28 |
$9,053,000 |
| 7536539 |
Method and apparatus for discovering hardware in a data processing system |
Anton Blanchard, Milton Devon Miller, II |
2009-05-19 |
$10,497,000 |
| 7401262 |
Method and apparatus for a low-level console |
Anton Blanchard, Milton Devon Miller, II |
2008-07-15 |
$7,406,000 |
| 7346809 |
Bootable post crash analysis environment |
Anton Blanchard, Milton Devon Miller, II |
2008-03-18 |
$8,037,000 |
| 7272759 |
Method and apparatus for system monitoring with reduced function cores |
Anton Blanchard, Milton Devon Miller, II |
2007-09-18 |
$6,075,000 |
