Issued Patents All Time
Showing 1–9 of 9 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 7822942 | Selectively invalidating entries in an address translation cache | Michael J. Corrigan, Paul LuVerne Godtland, Cathy May, Naresh Nayar, Edward John Silha | 2010-10-26 |
| 7752354 | Auxiliary mechanism to manage instruction restart and restart coming in a lookahead processor | Miles Robert Dooley, Bruce Joseph Ronchetti, Anthony Saporito | 2010-07-06 |
| 7660965 | Method to optimize effective page number to real page number translation path from page table entries match resumption of execution stream | Sheldon B. Levenstein, Bruce Joseph Ronchetti | 2010-02-09 |
| 7389400 | Apparatus and method for selectively invalidating entries in an address translation cache | Michael J. Corrigan, Paul LuVerne Godtland, Cathy May, Naresh Nayar, Edward John Silha | 2008-06-17 |
| 7350051 | Method to optimize effective page number to real page number translation path from page table entries match resumption of execution stream | Sheldon B. Levenstein, Bruce Joseph Ronchetti | 2008-03-25 |
| 7116569 | Method and apparatus for selecting operating characteristics of a content addressable memory by using a compare mask | Eric Jason Fluhr, Michael Ju Hyeok Lee, Jose Angel Paredes, Ed Seewann | 2006-10-03 |
| 6981128 | Atomic quad word storage in a simultaneous multithreaded system | Eric Jason Fluhr, Ronald Nick Kalla, Bruce Joseph Ronchetti, Balaram Sinharoy | 2005-12-27 |
| 5502732 | Method for testing ECC logic | Ronald Xavier Arroyo, William E. Burky, Tricia A. Gruwell | 1996-03-26 |
| 5446845 | Steering logic to directly connect devices having different data word widths | Ronald Xavier Arroyo, William E. Burky, Tricia A. Gruwell | 1995-08-29 |