Issued Patents All Time
Showing 1–14 of 14 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 12423234 | Cache governance in a computing environment with multiple processors | Guy G. Tracy, Gregory W. Alexander | 2025-09-23 |
| 12038841 | Decentralized hot cache line tracking fairness mechanism | Tu-An T. Nguyen, Matthias Klein, Gregory W. Alexander, Winston Herring, Timothy C. Bronson +1 more | 2024-07-16 |
| 11989128 | Invalidity protection for shared cache lines | Winston Herring, Gregory W. Alexander, Timothy C. Bronson | 2024-05-21 |
| 11907132 | Final cache directory state indication | Gregory W. Alexander, Timothy C. Bronson, Akash V. Giri, Winston Herring | 2024-02-20 |
| 11853212 | Preemptive tracking of remote requests for decentralized hot cache line fairness tracking | Tu-An T. Nguyen, Matthias Klein, Gregory W. Alexander, Vesselina K. Papazova | 2023-12-26 |
| 11782836 | Multiprocessor system cache management with non-authority designation | Winston Herring, Tu-An T. Nguyen, Gregory W. Alexander, Timothy C. Bronson, Christian Jacobi | 2023-10-10 |
| 11620231 | Lateral persistence directory states | Ram Sai Manoj Bamdhamravuri, Craig R. Walters, Christian Jacobi, Timothy C. Bronson, Gregory W. Alexander +4 more | 2023-04-04 |
| 11048427 | Evacuation of memory from a drawer in a live multi-node system | Tim Bronson, Hieu T. Huynh, Michael A. Blake | 2021-06-29 |
| 10956637 | Placement-driven generation of error detecting structures in integrated circuits | Ashraf ElSharif, Kenneth D. Klapproth | 2021-03-23 |
| 10901902 | Efficient inclusive cache management | Chad G. Wilson, Robert J. Sonnelitter, III, Tim Bronson, Ekaterina M. Ambroladze, Hieu T. Huynh +1 more | 2021-01-26 |
| 10891232 | Page-based memory operation with hardware initiated secure storage key update | Kevin Lopes, Deanna Postles Dunn Berger, Robert J. Sonnelitter, III | 2021-01-12 |
| 10802966 | Simultaneous, non-atomic request processing within an SMP environment broadcast scope for multiply-requested data elements using real-time parallelization | Arun Kwangil Iyengar, Tim Bronson, Michael A. Blake, Vesselina K. Papazova, Arthur J. O'Neill +1 more | 2020-10-13 |
| 10339064 | Hot cache line arbitration | Michael A. Blake, Timothy C. Bronson, Pak-kin Mak, Vesselina K. Papazova | 2019-07-02 |
| 10325049 | Placement-driven generation of error detecting structures in integrated circuits | Ashraf ElSharif, Kenneth D. Klapproth | 2019-06-18 |