Issued Patents All Time
Showing 26–46 of 46 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 9507660 | Eliminate corrupted portions of cache during runtime | Michael A. Blake, Michael Fee, Arthur J. O'Neill | 2016-11-29 |
| 9298468 | Monitoring processing time in a shared pipeline | Deanna Postles Dunn Berger, Michael Fee, Christine C. Jones, Arthur J. O'Neill, Diana L. Orf +1 more | 2016-03-29 |
| 9244851 | Cache coherency protocol for allowing parallel data fetches and eviction to the same addressable index | Michael A. Blake, Timothy C. Bronson, Garrett M. Drapala, Pak-kin Mak, Arthur J. O'Neill | 2016-01-26 |
| 9104583 | On demand allocation of cache buffer slots | Deanna Postles Dunn Berger, Michael Fee, Christine C. Jones, Diana L. Orf | 2015-08-11 |
| 9086990 | Bitline deletion | Michael A. Blake, Michael Fee, Hieu T. Huynh, Patrick J. Meaney, Arthur J. O'Neill | 2015-07-21 |
| 9003125 | Cache coherency protocol for allowing parallel data fetches and eviction to the same addressable index | Michael A. Blake, Tim Bronson, Garrett M. Drapala, Pak-kin Mak, Arthur J. O'Neill | 2015-04-07 |
| 8874957 | Dynamic cache correction mechanism to allow constant access to addressable index | Michael A. Blake, Timothy C. Bronson, Hieu T. Huynh | 2014-10-28 |
| 8788891 | Bitline deletion | Michael A. Blake, Michael Fee, Hieu T. Huynh, Patrick J. Meaney, Arthur J. O'Neill | 2014-07-22 |
| 8719618 | Dynamic cache correction mechanism to allow constant access to addressable index | Michael A. Blake, Timothy C. Bronson, Hieu T. Huynh | 2014-05-06 |
| 8671267 | Monitoring processing time in a shared pipeline | Deanna Postles Dunn Berger, Michael Fee, Christine C. Jones, Arthur J. O'Neill, Diana L. Orf +1 more | 2014-03-11 |
| 8645796 | Dynamic pipeline cache error correction | Michael Fee, Edward T. Gerchman, Arthur J. O'Neill | 2014-02-04 |
| 8595570 | Bitline deletion | Patrick J. Meaney | 2013-11-26 |
| 8522076 | Error detection and recovery in a shared pipeline | Deanna Postles Dunn Berger, Michael Fee, Arthur J. O'Neill, Diana L. Orf, Robert J. Sonnelitter, III | 2013-08-27 |
| 8468536 | Multiple level linked LRU priority | Deanna Postles Dunn Berger, Michael Fee, Diana L. Orf | 2013-06-18 |
| 8447905 | Dynamic multi-level cache including resource access fairness scheme | Deanna Postles Dunn Berger, Diana L. Orf, Robert J. Sonnelitter, III | 2013-05-21 |
| 8392621 | Managing dataflow in a temporary memory | Deanna Postles Dunn Berger, Michael Fee, Arthur J. O'Neill, Diana L. Orf, Robert J. Sonnelitter, III | 2013-03-05 |
| 8364899 | User-controlled targeted cache purge | Patrick J. Meaney, Arthur J. O'Neill | 2013-01-29 |
| 8365055 | High performance cache directory error correction code | Patrick J. Meaney, Arthur J. O'Neill | 2013-01-29 |
| 8327070 | Method for optimizing sequential data fetches in a computer system | Michael Fee, Arthur J. O'Neill | 2012-12-04 |
| 8250308 | Cache coherency protocol with built in avoidance for conflicting responses | Vesselina K. Papazova, Michael A. Blake, Pak-kin Mak, Arthur J. O'Neill, Craig R. Waters | 2012-08-21 |
| 8250243 | Diagnostic data collection and storage put-away station in a multiprocessor system | Deanna Postles Dunn Berger, Michael Fee, Christine C. Jones | 2012-08-21 |