Issued Patents All Time
Showing 1–13 of 13 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 12244709 | Updating keys used for encryption of storage circuitry | Jaekyu Lee, Yasuo Ishii | 2025-03-04 |
| 12182574 | Technique for predicting behaviour of control flow instructions | Alexander Cole Shulyak, Yasuo Ishii, Houdhaifa BOUZGUARROU | 2024-12-31 |
| 11966785 | Hardware resource configuration for processing system | Supreet Jeloka, Saurabh Sinha, Jaekyu Lee, Jose Alberto Joao, Krishnendra Nathella | 2024-04-23 |
| 11899583 | Multi-dimensional cache architecture | Joshua Randall, Alejandro Rico Carro, Saurabh Sinha, Jamshed Jalal | 2024-02-13 |
| 11640381 | System, device and/or process for hashing | Gwangsun Kim | 2023-05-02 |
| 11599361 | Flushing a fetch queue using predecode circuitry and prediction information | Jaekyu Lee, Yasuo Ishii, Krishnendra Nathella | 2023-03-07 |
| 11526356 | Prefetch mechanism for a cache structure | Lingzhe Cai, Krishnendra Nathella, Jaekyu Lee | 2022-12-13 |
| 11294828 | Apparatus and method for controlling allocation of information into a cache storage | Jaekyu Lee | 2022-04-05 |
| 10817426 | Prefetching techniques | Krishnendra Nathella, Chris Abernathy, Huzefa Sanjeliwala, Balaji Vijayan | 2020-10-27 |
| 10769070 | Multiple stride prefetching | Joseph Michael Pusdesris, Miles Robert Dooley, Alexander Cole Shulyak, Krishnendra Nathella | 2020-09-08 |
| 10725992 | Indexing entries of a storage structure shared between multiple threads | Mitchell Bryan Hayenga, Curtis Glenn Dunham | 2020-07-28 |
| 10185731 | Indexing entries of a storage structure shared between multiple threads | Mitchell Bryan Hayenga, Curtis Glenn Dunham | 2019-01-22 |
| 8200902 | Cache device for coupling to a memory device and a method of operation of such a cache device | Nigel C. Paver, Stuart David Biles, Prakash S. Ramrakhyani | 2012-06-12 |