Issued Patents All Time
Showing 1–25 of 35 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 12430127 | Vector test decimal instruction for validity testing | Michael Klein, Petra Leber, Andreas Wagner, Bruce C. Giamei, Timothy J. Slegel +3 more | 2025-09-30 |
| 12190078 | Rounding hexadecimal floating point numbers using binary incrementors | Michael Klein, Petra Leber, Cedric Lichtenau, Stefan Payer | 2025-01-07 |
| 12056465 | Verifying the correctness of a leading zero counter | Michael Klein, Petra Leber, Cedric Lichtenau, Stefan Payer | 2024-08-06 |
| 11861325 | Repurposed hexadecimal floating point data path | Nicol Hofmann, Michael Klein, Petra Leber | 2024-01-02 |
| 11663004 | Vector convert hexadecimal floating point to scaled decimal instruction | Eric M. Schwarz, Petra Leber, Silvia M. Mueller, Reid T. Copeland, Xin Guo +1 more | 2023-05-30 |
| 11531546 | Hexadecimal floating point multiply and add instruction | Eric M. Schwarz, Stefan Payer, Petra Leber, Michael Klein, Timothy J. Slegel +2 more | 2022-12-20 |
| 11487506 | Condition code anticipator for hexadecimal floating point | Silvia M. Mueller, Petra Leber, Cedric Lichtenau | 2022-11-01 |
| 11360769 | Decimal scale and convert and split to hexadecimal floating point instruction | Eric M. Schwarz, Petra Leber, Silvia M. Mueller, Reid T. Copeland, Xin Guo +1 more | 2022-06-14 |
| 11314512 | Efficient checking of a condition code anticipator for a floating point processor and/or unit | Petra Leber, Cedric Lichtenau, Michael Klein | 2022-04-26 |
| 11256511 | Instruction scheduling during execution in a processor | Cedric Lichtenau, Stefan Payer, Anthony Saporito, Gregory W. Alexander | 2022-02-22 |
| 11188299 | Repurposed hexadecimal floating point data path | Nicol Hofmann, Michael Klein, Petra Leber | 2021-11-30 |
| 11175890 | Hexadecimal exponent alignment for binary floating point unit | Petra Leber, Nicol Hofmann, Michael Klein | 2021-11-16 |
| 11175921 | Cognitive binary coded decimal to binary number conversion hardware for evaluating a preferred instruction variant based on feedback | Juergen Haess, Cedric Lichtenau, Stefan Payer | 2021-11-16 |
| 11163533 | Floating point unit for exponential function implementation | Xiao Sun, Ankur Agrawal, Kailash Gopalakrishnan, Silvia M. Mueller | 2021-11-02 |
| 11159183 | Residue checking of entire normalizer output of an extended result | Nicol Hofmann, Michael Klein, Razvan Peter Figuli | 2021-10-26 |
| 11042371 | Plausability-driven fault detection in result logic and condition codes for fast exact substring match | Razvan Peter Figuli, Stefan Payer, Cedric Lichtenau | 2021-06-22 |
| 10782968 | Rapid substring detection within a data element string | Razvan Peter Figuli, Stefan Payer, Cedric Lichtenau | 2020-09-22 |
| 10552167 | Clock-gating for multicycle instructions | Juergen Haess, Cedric Lichtenau, Stefan Payer | 2020-02-04 |
| 10459689 | Calculation of a number of iterations | Klaus M. Kroener, Silvia M. Mueller, Manuela Niekisch | 2019-10-29 |
| 10416962 | Decimal and binary floating point arithmetic calculations | Steven R. Carlough, Juergen Haess, Michael Klein, Klaus M. Kroener, Petra Leber +1 more | 2019-09-17 |
| 10365892 | Decimal floating point instructions to perform directly on compressed decimal floating point data | Steven R. Carlough, Petra Leber, Silvia M. Mueller | 2019-07-30 |
| 10303563 | Initializable repair circuit for selectively replacing a table-driven output | Steven R. Carlough, Silvia M. Mueller, Manuela Niekisch | 2019-05-28 |
| 10168993 | Zero detection of a sum of inputs without performing an addition | Michael K. Kroener, Silvia M. Mueller, Manuela Niekisch | 2019-01-01 |
| 10101967 | Zero detection of a sum of inputs without performing an addition | Michael K. Kroener, Silvia M. Mueller, Manuela Niekisch | 2018-10-16 |
| 9977680 | Clock-gating for multicycle instructions | Juergen Haess, Cedric Lichtenau, Stefan Payer | 2018-05-22 |