Issued Patents All Time
Showing 25 most recent of 51 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 12299413 | Dual vector arithmetic logic unit | Bin He, Mark Leather, Michael Mantor | 2025-05-13 |
| 12229570 | Block data load with transpose into memory | Bin He, Michael Mantor, Liang Huang, Chao Liu | 2025-02-18 |
| 12033238 | Register compaction with early release | Joseph L. Greathouse, Anthony Gutierrez | 2024-07-09 |
| 12033275 | System and methods for efficient execution of a collaborative task in a shader system | Michael Chow | 2024-07-09 |
| 11880683 | Packed 16 bits instruction pipeline | Jiasheng Chen, Bin He, Yunxiao Zou, Michael Mantor, Radhakrishna Giduthuri +1 more | 2024-01-23 |
| 11847462 | Software-based instruction scoreboard for arithmetic logic units | — | 2023-12-19 |
| 11675568 | Dual vector arithmetic logic unit | Bin He, Mark Leather, Michael Mantor | 2023-06-13 |
| 11386518 | Exception handler for sampling draw dispatch identifiers | Michael Mantor, Alexander Fuad Ashkar, Randy Wayne Ramsey, Mangesh P. Nijasure | 2022-07-12 |
| 11226819 | Selective prefetching in multithreaded processing units | Michael Mantor | 2022-01-18 |
| 11074075 | Wait instruction for preventing execution of one or more instructions until a load counter or store counter reaches a specified value | Mark Fowler | 2021-07-27 |
| 10474468 | Indicating instruction scheduling mode for processing wavefront portions | Michael Mantor, Mark Fowler, Mark Leather | 2019-11-12 |
| 10140123 | SIMD processing lanes storing input pixel operand data in local register file for thread execution of image processing operations | Michael Mantor | 2018-11-27 |
| 9619428 | SIMD processing unit with local data share and access to a global data share of a GPU | Michael Mantor | 2017-04-11 |
| 9529632 | Interlocked increment memory allocation and access | Michael Mantor, John McCardle, Marcos P. Zini | 2016-12-27 |
| 9311205 | Method and system for thread monitoring | — | 2016-04-12 |
| 9311102 | Dynamic control of SIMDs | Tushar K. Shah, Michael Mantor | 2016-04-12 |
| 9015720 | Efficient state transition among multiple programs on multi-threaded processors by executing cache priming program | Andrew Brown | 2015-04-21 |
| 8959319 | Executing first instructions for smaller set of SIMD threads diverging upon conditional branch instruction | Mark Leather, Norman Rubin, Michael Mantor | 2015-02-17 |
| 8862924 | Processor with power control via instruction issuance | Stephen D. Presant, Seth Hendrickson, Krishna Sitaraman, Ali Ibrahim, Jeff Herman | 2014-10-14 |
| 8832712 | System and method for synchronizing threads using shared memory having different buffer portions for local and remote cores in a multi-processor system | Michael Clair Houston, Stanislaw Skowronek, Elaine Poon | 2014-09-09 |
| 8607247 | Method and system for workitem synchronization | Lee W. Howes, Benedict R. Gaster, Michael Clair Houston, Michael Mantor, Mark Leather +1 more | 2013-12-10 |
| 8593465 | Handling of extra contexts for shader constants | Mark Leather | 2013-11-26 |
| 8413120 | Method and system for thread monitoring | — | 2013-04-02 |
| 8156314 | Incremental state updates | Mark Leather | 2012-04-10 |
| 7737994 | Large-kernel convolution using multiple industry-standard graphics accelerators | Michael A. Wasserman, Ewa M. Kubalska, Nathaniel David Naegle, Paul R. Ramsey, Mark E. Pascual | 2010-06-15 |