Issued Patents All Time
Showing 1–12 of 12 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 12198295 | Parallelization of convolution operations | Vidyashankar Viswanathan, Richard E. George | 2025-01-14 |
| 12105139 | Secure testing mode | Vidyashankar Viswanathan, Richard E. George | 2024-10-01 |
| 12067237 | Flexible memory system | Vidyashankar Viswanathan, Richard E. George | 2024-08-20 |
| 12033275 | System and methods for efficient execution of a collaborative task in a shader system | Brian D. Emberling | 2024-07-09 |
| 10929136 | Accurate early branch prediction using multiple predictors having different accuracy and latency in high-performance microprocessors | Shiwen Hu, Wei-Yu Chen, Qian Wang, Yongbin Zhou, Lixia Yang +1 more | 2021-02-23 |
| 9148466 | Presenting modules in a browser | Karen Fay, Renaud Waldura, Mike Wexler | 2015-09-29 |
| 7353368 | Method and apparatus for achieving architectural correctness in a multi-mode processor providing floating-point support | Elango Ganesan, John W. Phillips, Nazar Zaidi | 2008-04-01 |
| 6104731 | Method and apparatus for data forwarding in a processor having a dual banked register set | — | 2000-08-15 |
| 6038658 | Methods and apparatus to minimize the number of stall latches in a pipeline | — | 2000-03-14 |
| 5996065 | Apparatus for bypassing intermediate results from a pipelined floating point unit to multiple successive instructions | Sivakumar Makineni, Brian L. Hughes, Sunhyuk Kimn, Suri B. Medapati, Albert Lo | 1999-11-30 |
| 5768171 | Method and apparatus for improving the precision or area of a memory table used in floating-point computations | — | 1998-06-16 |
| 4543626 | Apparatus and method for controlling digital data processing system employing multiple processors | Robert G. Bean, Edward A. Gardner, Barry L. Rubinson, Richard F. Lary, Robert Blackledge | 1985-09-24 |