| 12394393 |
Display system and operation method for display system |
Junxin Qiu, Yongqiang Li, Yongbo Li, Xinrui Liu, Yupeng Zhang |
2025-08-19 |
|
| 12340730 |
Display device and operation method for display device |
Wenzhi Wang, Yongqiang Li, Junxin Qiu |
2025-06-24 |
|
| 12254236 |
Video transmission method and display |
Junxin Qiu, Yongqiang Li |
2025-03-18 |
|
| 12236238 |
Large integer multiplication enhancements for graphics environment |
Supratim Pal, Li-An Tang, Changwon Rhee, Timothy Bauer, Alexander Lyashevsky |
2025-02-25 |
|
| 12198222 |
Architecture for block sparse operations on a systolic array |
Abhishek R. Appu, Subramaniam Maiyuran, Mike B. Macpherson, Fangwen Fu, Varghese George +3 more |
2025-01-14 |
|
| 12189571 |
Dual pipeline parallel systolic array |
Jorge Parra, Supratim Pal, Fangwen Fu, Sabareesh Ganapathy, Chandra Gurram +2 more |
2025-01-07 |
|
| 12190158 |
Using sparsity metadata to reduce systolic array power consumption |
Jorge Parra, Supratim Pal, Chandra Gurram |
2025-01-07 |
|
| 12086205 |
Random sparsity handling in a systolic array |
Chunhui Mei, Hong Jiang, Yongsheng Liu, Yan Li |
2024-09-10 |
$16,964,000 |
| 12067401 |
Stream processor with low power parallel matrix multiply pipeline |
Yunxiao Zou, Michael Mantor, Allen H. Rush |
2024-08-20 |
$154,333,000 |
| 11880683 |
Packed 16 bits instruction pipeline |
Bin He, Yunxiao Zou, Michael Mantor, Radhakrishna Giduthuri, Eric J. Finger +1 more |
2024-01-23 |
$234,019,000 |
| 11842423 |
Dot product operations on sparse matrix elements |
Abhishek R. Appu, Subramaniam Maiyuran, Mike B. Macpherson, Fangwen Fu, Varghese George +3 more |
2023-12-12 |
$45,136,000 |
| 11789732 |
Arithmetic logic unit register sequencing |
Bin He, Jian Huang |
2023-10-17 |
$185,946,000 |
| 11768664 |
Processing unit with mixed precision operations |
Bin He, Michael Mantor |
2023-09-26 |
$346,496,000 |
| 11762658 |
Matrix multiplication unit with flexible precision operations |
Bin He, Michael Mantor, Jian Huang |
2023-09-19 |
$271,862,000 |
| 11630667 |
Dedicated vector sub-processor system |
Bin He, Jian Huang, Michael Mantor |
2023-04-18 |
$180,875,000 |
| 11625807 |
Low power and low latency GPU coprocessor for persistent computing |
Timour Paltashev, Alexander Lyashevsky, Carl K. Wakeland, Michael Mantor |
2023-04-11 |
$288,703,000 |
| 11494192 |
Pipeline including separate hardware data paths for different instruction types |
Yunxiao Zou, Bin He, Angel E. Socarras, QingCheng Wang, Wei-Hao Yuan +1 more |
2022-11-08 |
$115,530,000 |
| 11422204 |
Method for detecting open phase of startup/standby transformer based on optical CT |
Guang-Cheng Wang, Kai Wang, Yao Wang, Jun Chen, Qixue Zhang +2 more |
2022-08-23 |
|
| 11409536 |
Pairing SIMD lanes to perform double precision operations |
Bin He, Yunxiao Zou, Michael Mantor |
2022-08-09 |
$532,157,000 |
| 11347827 |
Hybrid matrix multiplication pipeline |
QingCheng Wang, Yunxiao Zou |
2022-05-31 |
$369,633,000 |
| 11237827 |
Arithemetic logic unit register sequencing |
Bin He, Jian Huang |
2022-02-01 |
$269,854,000 |
| 10970081 |
Stream processor with decoupled crossbar for cross lane operations |
Bin He, Mohammad Reza Hakami, Timothy Paul Lottes, Justin David Smith, Michael Mantor +1 more |
2021-04-06 |
$271,652,000 |
| 10929944 |
Low power and low latency GPU coprocessor for persistent computing |
Timour Paltashev, Alexander Lyashevsky, Carl K. Wakeland, Michael Mantor |
2021-02-23 |
$188,100,000 |
| 10817302 |
Processor support for bypassing vector source operands |
Bin He, Mark Leather, Michael Mantor, Yunxiao Zou |
2020-10-27 |
$44,640,000 |
| 10701545 |
File sending method and terminal, and file receiving method and terminal |
Zhongyin Jiang, Dawei Li, Kunfang Chen, Xingliang Tao |
2020-06-30 |
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