BE

Brian D. Emberling

Oracle: 27 patents #267 of 14,854Top 2%
AM AMD: 25 patents #398 of 9,279Top 5%
🗺 California: #7,669 of 386,348 inventorsTop 2%
Overall (All Time): #51,667 of 4,157,543Top 2%
51
Patents All Time

Issued Patents All Time

Showing 26–50 of 51 patents

Patent #TitleCo-InventorsDate
7360020 Method for improving cache-miss performance 2008-04-15
7184508 Capturing data and crossing clock domains in the absence of a free-running source clock 2007-02-27
7151544 Method for improving texture cache access by removing redundant requests 2006-12-19
7145570 Magnified texture-mapped pixel performance in a single-pixel pipeline Michael G. Lavelle 2006-12-05
7089509 Controlling the propagation of a control signal by means of variable I/O delay compensation using a programmable delay circuit and detection sequence Anthony Ramirez 2006-08-08
7089369 Method for optimizing utilization of a double-data-rate-SDRAM memory system 2006-08-08
7069387 Optimized cache structure for multi-texturing 2006-06-27
7023444 Multi-texturing by walking an appropriately-sized supertile over a primitive Michael G. Lavelle, Assana M. Fard, Nandini Ramani, David Kehlet, Michael A. Wasserman +2 more 2006-04-04
6957399 Controlling the propagation of a digital signal by means of variable I/O delay compensation using delay-tracking Anthony Ramirez 2005-10-18
6943797 Early primitive assembly and screen-space culling for multiple chip graphics system Michael A. Wasserman, Ewa M. Kubalska 2005-09-13
6933945 Design for a non-blocking cache for texture mapping 2005-08-23
6914610 Graphics primitive size estimation and subdivision for use with a texture accumulation buffer Michael G. Lavelle, Wayne Morse, Rangit S. Oberoi, David Kehlet, Michael A. Wasserman +1 more 2005-07-05
6906720 Multipurpose memory system for use in a graphics system Michael G. Lavelle 2005-06-14
6885375 Stalling pipelines in large designs Ewa M. Kubalska, Steve Kurihara, Anthony Ramirez, Andre J. Gaytan 2005-04-26
6864892 Graphics data synchronization with multiple data paths in a graphics accelerator Michael G. Lavelle, David Kehlet, Thomas W. Bowman 2005-03-08
6859209 Graphics data accumulation for improved multi-layer texture performance Michael G. Lavelle, Ranjit Oberoi, Deron D. Johnson, Ewa M. Kubalska 2005-02-22
6847372 Magnified texture-mapped pixel performance in a single-pixel pipeline Michael G. Lavelle 2005-01-25
6842851 Reading a selected register in a series of computational units forming a processing pipeline upon expiration of a time delay Wayne Eric Burk, Ewa M. Kubalska 2005-01-11
6833831 Synchronizing data streams in a graphics processor Ewa M. Kubalska 2004-12-21
6819324 Memory interleaving technique for texture mapping in a graphics system 2004-11-16
6812928 Performance texture mapping by combining requests for image data Michael G. Lavelle 2004-11-02
6781406 Using observability logic for real-time debugging of ASICs Ewa M. Kubalska 2004-08-24
6778188 Reconfigurable hardware filter for texture mapping and image processing Michael G. Lavelle 2004-08-17
6741256 Predictive optimizer for DRAM memory 2004-05-25
6731292 System and method for controlling a number of outstanding data transactions within an integrated circuit Wayne Eric Burk, Ewa M. Kubalska 2004-05-04