Issued Patents All Time
Showing 25 most recent of 26 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 11379708 | Techniques for efficiently operating a processing system based on energy characteristics of instructions and machine learning | Sachin Satish Idgunji, Ming Y. Siu, Alex Gu, James P. Reilley, Manan Patel +1 more | 2022-07-05 |
| 9423846 | Powered ring to maintain IO state independent of the core of an integrated circuit device | Brian L. Smith | 2016-08-23 |
| 8659601 | Program sequencer for generating indeterminant length shader programs for a graphics processor | Justin Michael Mahan, Edward A. Hutchins, James T. Battle | 2014-02-25 |
| 7737994 | Large-kernel convolution using multiple industry-standard graphics accelerators | Michael A. Wasserman, Nathaniel David Naegle, Brian D. Emberling, Paul R. Ramsey, Mark E. Pascual | 2010-06-15 |
| 7027064 | Active block write-back from SRAM cache to DRAM | Michael G. Lavelle, Yan Yan Tang | 2006-04-11 |
| 7023444 | Multi-texturing by walking an appropriately-sized supertile over a primitive | Brian D. Emberling, Michael G. Lavelle, Assana M. Fard, Nandini Ramani, David Kehlet +2 more | 2006-04-04 |
| 6943797 | Early primitive assembly and screen-space culling for multiple chip graphics system | Michael A. Wasserman, Brian D. Emberling | 2005-09-13 |
| 6924820 | Over-evaluating samples during rasterization for improved datapath utilization | Nandini Ramani, David Kehlet, Michael G. Lavelle, Mark E. Pascual, Yi-Ming Tian | 2005-08-02 |
| 6895458 | Opcode to turn around a bi-directional bus | Lisa Grenier, Yan Yan Tang, Elena Ing | 2005-05-17 |
| 6885375 | Stalling pipelines in large designs | Brian D. Emberling, Steve Kurihara, Anthony Ramirez, Andre J. Gaytan | 2005-04-26 |
| 6859209 | Graphics data accumulation for improved multi-layer texture performance | Michael G. Lavelle, Brian D. Emberling, Ranjit Oberoi, Deron D. Johnson | 2005-02-22 |
| 6847369 | Optimized packing of loose data in a graphics queue | Michael G. Lavelle, Anthony Ramirez, Huang-Ming Pan | 2005-01-25 |
| 6842851 | Reading a selected register in a series of computational units forming a processing pipeline upon expiration of a time delay | Wayne Eric Burk, Brian D. Emberling | 2005-01-11 |
| 6833831 | Synchronizing data streams in a graphics processor | Brian D. Emberling | 2004-12-21 |
| 6833834 | Frame buffer organization and reordering | Michael A. Wasserman, Michael G. Lavelle, David Kehlet, Yan Yan Tang | 2004-12-21 |
| 6812929 | System and method for prefetching data from a frame buffer | Michael G. Lavelle, Yan Yan Tang | 2004-11-02 |
| 6803916 | Rasterization using two-dimensional tiles and alternating bins for improved rendering utilization | Nandini Ramani, David Kehlet, Michael G. Lavelle, Michael A. Wasserman, Kevin Dechau Tang +1 more | 2004-10-12 |
| 6795078 | Parallel read with source-clear operation | Michael G. Lavelle, Yan Yan Tang | 2004-09-21 |
| 6781406 | Using observability logic for real-time debugging of ASICs | Brian D. Emberling | 2004-08-24 |
| 6778179 | External dirty tag bits for 3D-RAM SRAM | Michael G. Lavelle, Yan Yan Tang | 2004-08-17 |
| 6731292 | System and method for controlling a number of outstanding data transactions within an integrated circuit | Wayne Eric Burk, Brian D. Emberling | 2004-05-04 |
| 6720969 | Dirty tag bits for 3D-RAM SRAM | Michael G. Lavelle, Yan Yan Tang | 2004-04-13 |
| 6704026 | Graphics fragment merging for improving pixel write bandwidth | Steven M. Kurihara | 2004-03-09 |
| 6661423 | Splitting grouped writes to different memory blocks | Michael G. Lavelle, Elena Ing | 2003-12-09 |
| 6359630 | Graphics system using clip bits to decide acceptance, rejection, clipping | Wayne Morse, Michael F. Deering, Mike Lavelle, Huang-Ming Pan, Scott R. Nelson | 2002-03-19 |