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USPTO Patent Rankings Data through Dec 31, 2025
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James R. Magro — 58 Patents

AMD: 59 patents #101 of 9,280Top 2%
Lakeway, TX: #2 of 108 inventorsTop 2%
Texas: #1,333 of 125,132 inventorsTop 2%
Overall (All Time): #41,319 of 4,157,543Top 1%
58 Patents All Time
James R. Magro has been granted 58 US patents while listed as an inventor at AMD. The first was granted in 2000 and the most recent in July 2025. James R. Magro ranks #41,319 of 4,157,543 US inventors in our database (top 0.99%). Patent records list James R. Magro in Lakeway, TX, US.

Issued Patents All Time

Showing 1–25 of 58 patents

Patent #TitleCo-InventorsDateApprox Value ⓘ
12373361 Systems, methods, and devices for advanced memory technology Niti Madan, Gabriel H. Loh 2025-07-29
12322434 Directed refresh management for DRAM Kevin M. Brandl, Kedarnath Balakrishnan, Jing Wang 2025-06-03
12299297 Memory controller with enhanced low-power state Kevin M. Brandl, Jean J. Chittilappilly, Tahsin Askar 2025-05-13
12253961 Staging memory access requests Kedarnath Balakrishnan, Ravindra N. Bhargava, Guanhao Shen 2025-03-18
12243576 Memory calibration system and method Jing Wang, Kedarnath Balakrishnan, Kevin M. Brandl 2025-03-04
12204754 Scheduling memory requests with non-uniform latencies Kedarnath Balakrishnan 2025-01-21
12158827 Full dynamic post-package repair Kedarnath Balakrishnan, Kevin M. Brandl 2024-12-03 $389,120,000
12154657 Channel and sub-channel throttling for memory controllers Kedarnath Balakrishnan 2024-11-26 $172,029,000
12141038 Error recovery for non-volatile memory modules Jing Wang, Kedarnath Balakrishnan 2024-11-12 $767,076,000
12135601 Data fabric C-state management Benjamin Tsien, Alexander J. Branover, Dilip Kumar Jha, Mingliang Lin, Kostantinos Danny Christidis +1 more 2024-11-05 $475,519,000
12038856 Memory controller with a plurality of command sub-queues and corresponding arbiters Kedarnath Balakrishnan, Brendan T. Mangan 2024-07-16 $403,462,000
11995008 Memory controller with hybrid DRAM/persistent memory channel arbitration Guanhao Shen, Ravindra N. Bhargava, Kedarnath Balakrishnan 2024-05-28 $447,351,000
11934251 Data fabric clock switching Christopher T. Weaver, Abhishek Kumar Verma 2024-03-19 $317,160,000
11797369 Error reporting for non-volatile memory modules Kedarnath Balakrishnan, Vilas Sridharan 2023-10-24 $302,839,000
11748034 Signalling for heterogeneous memory systems Kedarnath Balakrishnan 2023-09-05 $300,372,000
11704183 Data integrity for persistent memory systems and the like Kedarnath Balakrishnan, Kevin M. Lepak, Vilas Sridharan 2023-07-18 $179,194,000
11675659 DDR memory error recovery Ruihua Peng, Anthony Asaro, Kedarnath Balakrishnan, Scott P. Murphy, YuBin Yao 2023-06-13 $166,732,000
11664062 Memory calibration system and method Jing Wang, Kedarnath Balakrishnan, Kevin M. Brandl 2023-05-30 $479,500,000
11636054 Memory controller power states Kevin M. Brandl, Indrani Paul, Jean J. Chittilappilly, Abhishek Kumar Verma, Kavyashree Pilar 2023-04-25 $464,331,000
11561862 Refresh management for DRAM Jing Wang, Kedarnath Balakrishnan 2023-01-24 $206,859,000
11531601 Error recovery for non-volatile memory modules Jing Wang, Kedarnath Balakrishnan 2022-12-20 $531,704,000
11526278 Adaptive page close prediction Guanhao Shen, Ravindra N. Bhargava, Kedarnath Balakrishnan, Kevin M. Brandl 2022-12-13 $287,886,000
11494316 Memory controller with a plurality of command sub-queues and corresponding arbiters Kedarnath Balakrishnan, Brendan T. Mangan 2022-11-08 $115,530,000
11474942 Supporting responses for memory types with non-uniform latencies on same channel Kedarnath Balakrishnan 2022-10-18 $252,368,000
11429281 Speculative hint-triggered activation of pages in memory Ravindra N. Bhargava, Philip Park, Vydhyanathan Kalyanasundharam 2022-08-30 $462,832,000