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USPTO Patent Rankings Data through Dec 31, 2025
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Kedarnath Balakrishnan — 49 Patents

AMD: 43 patents #183 of 9,280Top 2%
NANec Laboratories America: 5 patents #80 of 412Top 20%
Nec: 1 patents #7,928 of 14,502Top 55%
Overall (All Time): #55,592 of 4,157,543Top 2%
49 Patents All Time
Kedarnath Balakrishnan has been granted 49 US patents while listed as an inventor at AMD. The first was granted in 2007 and the most recent in June 2025. Kedarnath Balakrishnan ranks #55,592 of 4,157,543 US inventors in our database (top 1.3%). Patent records list Kedarnath Balakrishnan in Kanchinakote, TX, IN.

Issued Patents All Time

Showing 1–25 of 49 patents

Patent #TitleCo-InventorsDateApprox Value ⓘ
12322434 Directed refresh management for DRAM Kevin M. Brandl, James R. Magro, Jing Wang 2025-06-03
12282439 Dynamic page state aware scheduling of read/write burst transactions Guanhao Shen, Ravindra N. Bhargava 2025-04-22
12265732 Refresh during power state changes Jean J. Chittilappilly, Kevin M. Brandl, Jing Wang 2025-04-01
12253961 Staging memory access requests James R. Magro, Ravindra N. Bhargava, Guanhao Shen 2025-03-18
12243576 Memory calibration system and method Jing Wang, Kevin M. Brandl, James R. Magro 2025-03-04
12204754 Scheduling memory requests with non-uniform latencies James R. Magro 2025-01-21
12158827 Full dynamic post-package repair Kevin M. Brandl, James R. Magro 2024-12-03 $389,120,000
12154657 Channel and sub-channel throttling for memory controllers James R. Magro 2024-11-26 $172,029,000
12141038 Error recovery for non-volatile memory modules Jing Wang, James R. Magro 2024-11-12 $767,076,000
12118247 Performance of bank refresh Jing Wang, Guanhao Shen 2024-10-15 $230,783,000
12038856 Memory controller with a plurality of command sub-queues and corresponding arbiters James R. Magro, Brendan T. Mangan 2024-07-16 $403,462,000
11995008 Memory controller with hybrid DRAM/persistent memory channel arbitration Guanhao Shen, Ravindra N. Bhargava, James R. Magro 2024-05-28 $447,351,000
11797369 Error reporting for non-volatile memory modules James R. Magro, Vilas Sridharan 2023-10-24 $302,839,000
11748034 Signalling for heterogeneous memory systems James R. Magro 2023-09-05 $300,372,000
11704183 Data integrity for persistent memory systems and the like James R. Magro, Kevin M. Lepak, Vilas Sridharan 2023-07-18 $179,194,000
11694739 Refresh management for memory Kevin M. Brandl, Jing Wang, Guanhao Shen 2023-07-04
11675659 DDR memory error recovery James R. Magro, Ruihua Peng, Anthony Asaro, Scott P. Murphy, YuBin Yao 2023-06-13 $166,732,000
11669274 Write bank group mask during arbitration 2023-06-06 $656,588,000
11664062 Memory calibration system and method Jing Wang, Kevin M. Brandl, James R. Magro 2023-05-30 $479,500,000
11561862 Refresh management for DRAM Jing Wang, James R. Magro 2023-01-24 $206,859,000
11531601 Error recovery for non-volatile memory modules Jing Wang, James R. Magro 2022-12-20 $531,704,000
11526278 Adaptive page close prediction Guanhao Shen, Ravindra N. Bhargava, James R. Magro, Kevin M. Brandl 2022-12-13 $287,886,000
11494316 Memory controller with a plurality of command sub-queues and corresponding arbiters James R. Magro, Brendan T. Mangan 2022-11-08 $115,530,000
11474942 Supporting responses for memory types with non-uniform latencies on same channel James R. Magro 2022-10-18 $252,368,000
11392441 Error reporting for non-volatile memory modules James R. Magro, Vilas Sridharan 2022-07-19 $252,016,000