KL

Kevin M. Lepak

AM AMD: 41 patents #198 of 9,279Top 3%
Samsung: 5 patents #22,466 of 75,807Top 30%
Globalfoundries: 3 patents #1,029 of 4,424Top 25%
Overall (All Time): #71,292 of 4,157,543Top 2%
42
Patents All Time

Issued Patents All Time

Showing 25 most recent of 42 patents

Patent #TitleCo-InventorsDate
12298829 Platform power manager for rack level power and thermal constraints Indrani Paul, Sriram Sambamurthy, Larry D. Hewitt, Samuel D. Naffziger, Adam Neil Calder Clark +6 more 2025-05-13
12189535 Tiered memory caching Vydhyanathan Kalyanasundharam, Ganesh Balakrishnan, Amit P. Apte 2025-01-07
12158845 Region based split-directory scheme to adapt to large cache sizes Vydhyanathan Kalyanasundharam, Amit P. Apte, Ganesh Balakrishnan 2024-12-03
12141066 Probe filter directory management Amit P. Apte, Ganesh Balakrishnan, Vydhyanathan Kalyanasundharam 2024-11-12
12131063 Methods and apparatus for offloading tiered memories management 2024-10-29
11809322 Region based directory scheme to adapt to large cache sizes Vydhyanathan Kalyanasundharam, Amit P. Apte, Ganesh Balakrishnan, Eric Christopher Morton, Elizabeth M. Cooper +1 more 2023-11-07
11782848 Home agent based cache transfer acceleration scheme Amit P. Apte, Ganesh Balakrishnan, Vydhyanathan Kalyanasundharam 2023-10-10
11703930 Platform power manager for rack level power and thermal constraints Indrani Paul, Sriram Sambamurthy, Larry D. Hewitt, Samuel D. Naffziger, Adam Neil Calder Clark +6 more 2023-07-18
11704183 Data integrity for persistent memory systems and the like Kedarnath Balakrishnan, James R. Magro, Vilas Sridharan 2023-07-18
11693465 Method and apparatus for data scrambling Yanfeng Wang, Michael J. Tresidder, Larry D. Hewitt, Noah Beck 2023-07-04
11455251 Enhanced durability for systems on chip (SOCs) Alexander J. Branover, William A. Moyes 2022-09-27
11314646 Region based split-directory scheme to adapt to large cache sizes Vydhyanathan Kalyanasundharam, Amit P. Apte, Ganesh Balakrishnan 2022-04-26
11281280 Reducing chiplet wakeup latency Benjamin Tsien, Michael J. Tresidder, Ivan Yanfeng Wang, Ann Ling, Richard Martin Born +3 more 2022-03-22
11200106 Data integrity for persistent memory systems and the like Kedarnath Balakrishnan, James R. Magro, Vilas Sridharan 2021-12-14
11169925 Capturing temporal store streams into CPU caches by dynamically varying store streaming thresholds Tarun Nakra 2021-11-09
11119926 Region based directory scheme to adapt to large cache sizes Vydhyanathan Kalyanasundharam, Amit P. Apte, Ganesh Balakrishnan, Eric Christopher Morton, Elizabeth M. Cooper +1 more 2021-09-14
11073888 Platform power manager for rack level power and thermal constraints Indrani Paul, Sriram Sambamurthy, Larry D. Hewitt, Samuel D. Naffziger, Adam Neil Calder Clark +6 more 2021-07-27
11036658 Light-weight memory expansion in a coherent memory system Vydhyanathan Kalyanasundharam, Philip Ng, Alexander J. Branover 2021-06-15
10895901 Method and apparatus for data scrambling Yanfeng Wang, Michael J. Tresidder, Larry D. Hewitt, Noah Beck 2021-01-19
10776282 Home agent based cache transfer acceleration scheme Amit P. Apte, Ganesh Balakrishnan, Vydhyanathan Kalyanasundharam 2020-09-15
10705959 Region based split-directory scheme to adapt to large cache sizes Vydhyanathan Kalyanasundharam, Amit P. Apte, Ganesh Balakrishnan 2020-07-07
10656696 Reducing chiplet wakeup latency Benjamin Tsien, Michael J. Tresidder, Ivan Yanfeng Wang, Ann Ling, Richard Martin Born +3 more 2020-05-19
10545875 Tag accelerator for low latency DRAM cache Vydhyanathan Kalyanasundharam, Ganesh Balakrishnan, Ravindra N. Bhargava 2020-01-28
10366008 Tag and data organization in large memory caches Ganesh Balakrishnan, Vydhyanathan Kalyanasundharam 2019-07-30
10216640 Opportunistic cache injection of data into lower latency levels of the cache hierarchy Andrew Joseph RUSHING 2019-02-26