| 11809322 |
Region based directory scheme to adapt to large cache sizes |
Vydhyanathan Kalyanasundharam, Kevin M. Lepak, Amit P. Apte, Ganesh Balakrishnan, Eric Christopher Morton +1 more |
2023-11-07 |
| 11119926 |
Region based directory scheme to adapt to large cache sizes |
Vydhyanathan Kalyanasundharam, Kevin M. Lepak, Amit P. Apte, Ganesh Balakrishnan, Eric Christopher Morton +1 more |
2021-09-14 |
| 10540316 |
Cancel and replay protocol scheme to improve ordered bandwidth |
Vydhyanathan Kalyanasundharam, Eric Christopher Morton, Chen-Ping Yang, Amit P. Apte |
2020-01-21 |
| 10534743 |
Method and apparatus for providing performance data over a debug bus |
— |
2020-01-14 |
| 10366027 |
I/O writes with cache steering |
Eric Christopher Morton, William L. Walker, Douglas Benson Hunt, Richard Martin Born, Richard H. Lee +3 more |
2019-07-30 |
| 10248564 |
Contended lock request elision scheme |
Vydhyanathan Kalyanasundharam, Eric Christopher Morton, Amit P. Apte |
2019-04-02 |
| 9507715 |
Coherency probe with link or domain indicator |
Eric Christopher Morton, Patrick Conway, Vydhyanathan Kalyanasundharam |
2016-11-29 |
| 8935574 |
Correlating traces in a computing system |
Ryan D. Bedwell, Eric M. Rentschler |
2015-01-13 |
| 8683265 |
Debug state machine cross triggering |
Eric M. Rentschler, Steven J. Kommrusch, Stephen C. Ennis |
2014-03-25 |
| 8180944 |
Guest interrupt manager that records interrupts for guests and delivers interrupts to executing guests |
Benjamin C. Serebrin, John F. Wiederhirn, Mark Hummel |
2012-05-15 |
| 6047357 |
High speed method for maintaining cache coherency in a multi-level, set associative cache hierarchy |
Peter J. Bannon |
2000-04-04 |
| 5548553 |
Method and apparatus for providing high-speed column redundancy |
Michael Leary |
1996-08-20 |