SE

Stephen C. Ennis

AM AMD: 14 patents #820 of 9,279Top 9%
Globalfoundries: 2 patents #1,397 of 4,424Top 35%
Overall (All Time): #322,844 of 4,157,543Top 8%
15
Patents All Time

Issued Patents All Time

Patent #TitleCo-InventorsDate
10458857 Accurate on-chip temperature sensing using thermal oscillator Ravinder Reddy Rachala, Stephen V. Kosonocky 2019-10-29
9317082 Controlling operation of temperature sensors Benjamin D. Bates, Brian E. Williams 2016-04-19
8683265 Debug state machine cross triggering Eric M. Rentschler, Steven J. Kommrusch, Elizabeth M. Cooper 2014-03-25
8594966 Data processing interface device Philip E. Madrid 2013-11-26
7996653 Shared resources in a chip multiprocessor William A. Hughes, Vydhyanathan Kalyanasundharam, Kiran Bondalapati, Philip E. Madrid 2011-08-09
7840780 Shared resources in a chip multiprocessor William A. Hughes, Vydhyanathan Kalyanasundharam, Kiran Bondalapati, Philip E. Madrid 2010-11-23
7383423 Shared resources in a chip multiprocessor William A. Hughes, Vydhyanathan Kalyanasundharam, Kiran Bondalapati, Philip E. Madrid 2008-06-03
6915371 Tunnel device for an input/output node of a computer system Paul W. Berndt 2005-07-05
6839784 Control unit of an I/O node for a computer system including a plurality of scheduler units each including a plurality of buffers each corresponding to a respective virtual channel Paul W. Berndt 2005-01-04
6820151 Starvation avoidance mechanism for an I/O node of a computer system 2004-11-16
6807599 Computer system I/O node for connection serially in a chain to a host Larry D. Hewitt 2004-10-19
6728790 Tagging and arbitration mechanism in an input/output node of a computer system 2004-04-27
6721816 Selecting independently of tag values a given command belonging to a second virtual channel and having a flag set among commands belonging to a posted virtual and the second virtual channels James R. Magro 2004-04-13
6681274 Virtual channel buffer bypass for an I/O node of a computer system 2004-01-20
6571332 Method and apparatus for combined transaction reordering and buffer management Paul C. Miranda, Larry D. Hewitt 2003-05-27