| 10366027 |
I/O writes with cache steering |
Eric Christopher Morton, Elizabeth M. Cooper, William L. Walker, Douglas Benson Hunt, Richard Martin Born +3 more |
2019-07-30 |
| 8570881 |
Transmitter voltage and receiver time margining |
Gerald R. Talbot, Emerson S. Fang, Rohit Kumar |
2013-10-29 |
| 8402241 |
Method and apparatus to control access to device enable features |
Kenneth House, Charles K. Bachand |
2013-03-19 |
| 8244950 |
Buffering non-posted read commands and responses |
Frank Barth, Larry D. Hewitt, Joerg Winkler |
2012-08-14 |
| 8103788 |
Method and apparatus for dynamically reallocating buffers for use in a packet transmission |
— |
2012-01-24 |
| 8000404 |
Method and apparatus to reduce the effect of crosstalk in a communications interface |
Gerald R. Talbot |
2011-08-16 |
| 7986727 |
In-band method to configure equalization levels |
Gerald R. Talbot, Larry D. Hewitt, Rohit Kumar, Emerson S. Fang |
2011-07-26 |
| 7983181 |
Technique for negotiating a width of a packet-based communication link |
Larry D. Hewitt |
2011-07-19 |
| 7913150 |
Error detection in a communications link |
— |
2011-03-22 |
| 7617404 |
In-band power management in a communication link |
Paul A. Mackey, Larry D. Hewitt, Jonathan Owen |
2009-11-10 |
| 7607031 |
Power management in a communication link |
Paul A. Mackey, Larry D. Hewitt, Jonathan Owen |
2009-10-20 |
| 7421525 |
System including a host connected to a plurality of memory modules via a serial memory interconnect |
R. Stephen Polzin, Frederick Daniel Weber, Gerald R. Talbot, Larry D. Hewitt, Richard W. Reeves +4 more |
2008-09-02 |
| 7174467 |
Message based power management in a multi-processor system |
Frank P. Helms, Dale E. Gulick, Larry D. Hewitt, William A. Hughes, Derrick R. Meyer +2 more |
2007-02-06 |
| 7051218 |
Message based power management |
Dale E. Gulick, Frank P. Helms, Larry D. Hewitt, William A. Hughes, Derrick R. Meyer +2 more |
2006-05-23 |
| 7016213 |
Method for initializing a system including a host and plurality of memory modules connected via a serial memory interconnect |
Richard W. Reeves, Ross V. La Fetra |
2006-03-21 |
| 6865618 |
System and method of assigning device numbers to I/O nodes of a computer system |
Larry D. Hewitt |
2005-03-08 |
| 6782486 |
Apparatus for stopping and starting a clock in a clock forwarded I/O system depending on the presence of valid data in a receive buffer |
Brian D. McMinn |
2004-08-24 |
| 6571332 |
Method and apparatus for combined transaction reordering and buffer management |
Larry D. Hewitt, Stephen C. Ennis |
2003-05-27 |
| 6119194 |
Method and apparatus for monitoring universal serial bus activity |
Larry D. Hewitt, David Norris, James Bunnell |
2000-09-12 |
