Issued Patents All Time
Showing 25 most recent of 26 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 12032965 | Throttling while managing upstream resources | Paul James Moyer, Kai Troester | 2024-07-09 |
| 11669457 | Quality of service dirty line tracking | Paul James Moyer | 2023-06-06 |
| 11429647 | Domain specific predictive model for entity assessment and valuation | — | 2022-08-30 |
| 11294710 | Thread switch for accesses to slow memory | — | 2022-04-05 |
| 11169812 | Throttling while managing upstream resources | Paul James Moyer, Kai Troester | 2021-11-09 |
| 11106594 | Quality of service dirty line tracking | Paul James Moyer | 2021-08-31 |
| 10938559 | Security key identifier remapping | — | 2021-03-02 |
| 10700954 | Scheduling memory bandwidth based on quality of service floorbackground | Jay Fleischman | 2020-06-30 |
| 10613983 | Prefetcher based speculative dynamic random-access memory read request technique | Tanuj Kumar Agarwal, Anasua Bhowmik | 2020-04-07 |
| 10489218 | Suppression of speculative accesses to shared memory locations at a processor | William E. Jones | 2019-11-26 |
| 10366027 | I/O writes with cache steering | Eric Christopher Morton, Elizabeth M. Cooper, William L. Walker, Richard Martin Born, Richard H. Lee +3 more | 2019-07-30 |
| 9465748 | Instruction fetch translation lookaside buffer management to support host and guest O/S translations | Prasanta K. Bhowmik | 2016-10-11 |
| 8843726 | Cache for storing multiple forms of information and a method for controlling a cache storing multiple forms of information | — | 2014-09-23 |
| 8832381 | Cache and a method for replacing entries in the cache | — | 2014-09-09 |
| 6353882 | Reducing branch prediction interference of opposite well behaved branches sharing history entry by static prediction correctness based updating | — | 2002-03-05 |
| 6308261 | Computer system having an instruction for probing memory latency | Dale Morris | 2001-10-23 |
| 6151672 | Methods and apparatus for reducing interference in a branch history table of a microprocessor | — | 2000-11-21 |
| 5956477 | Method for processing information in a microprocessor to facilitate debug and performance monitoring | Gregory L. Ranson, Gregg B. Lesartre, Russell C. Brockmann, Steven T. Mangelsdorf | 1999-09-21 |
| 5893091 | Multicasting with key words | Mauro Calvi, Carlen Brett Bennett, Robert L. Hines, Jr., James C. Peterson | 1999-04-06 |
| 5887003 | Apparatus and method for comparing a group of binary fields with an expected pattern to generate match results | Gregory L. Ranson, Russell C. Brockmann | 1999-03-23 |
| 5867644 | System and method for on-chip debug support and performance monitoring in a microprocessor | Gregory L. Ranson, John W. Bockhaus, Gregg B. Lesartre, Russell C. Brockmann, Robert E. Naas +4 more | 1999-02-02 |
| 5781923 | Adding a field to the cache tag in a computer system to indicate byte ordering | — | 1998-07-14 |
| 5761490 | Changing the meaning of a pre-decode bit in a cache memory depending on branch prediction mode | — | 1998-06-02 |
| 5740391 | Preventing premature early exception signaling with special instruction encoding | — | 1998-04-14 |
| 5155832 | Method to increase performance in a multi-level cache system by the use of forced cache misses | — | 1992-10-13 |