| 12455739 |
Instruction set architecture for a vector computational unit |
Debjit Das Sarma, Emil Talpes |
2025-10-28 |
|
| 12306703 |
System and method for handling errors in a vehicle neural network processor |
Christopher Hsiong, Emil Talpes, Debjit Das Sarma, Kevin A. Hurd, Benjamin Floering |
2025-05-20 |
|
| 12307350 |
Systems and methods for hardware-based pooling |
Kevin A. Hurd |
2025-05-20 |
|
| 12216610 |
Computational array microprocessor system using non-consecutive data formatting |
Emil Talpes, William McGee |
2025-02-04 |
|
| 12086097 |
Vector computational unit |
Debjit Das Sarma, Emil Talpes |
2024-09-10 |
$2,868,157,000 |
| 11893393 |
Computational array microprocessor system with hardware arbiter managing memory requests |
Emil Talpes, Kevin A. Hurd |
2024-02-06 |
$2,120,485,000 |
| 11797304 |
Instruction set architecture for a vector computational unit |
Debjit Das Sarma, Emil Talpes |
2023-10-24 |
$8,448,203,000 |
| 11734095 |
System and method for handling errors in a vehicle neural network processor |
Christopher Hsiong, Emil Talpes, Debjit Das Sarma, Kevin A. Hurd, Benjamin Floering |
2023-08-22 |
$4,612,383,000 |
| 11698773 |
Accelerated mathematical engine |
Kevin A. Hurd, Emil Talpes |
2023-07-11 |
$5,438,718,000 |
| 11681649 |
Computational array microprocessor system using non-consecutive data formatting |
Emil Talpes, William McGee |
2023-06-20 |
$5,286,815,000 |
| 11561791 |
Vector computational unit receiving data elements in parallel from a last row of a computational array |
Debjit Das Sarma, Emil Talpes |
2023-01-24 |
$3,290,836,000 |
| 11409692 |
Vector computational unit |
Debjit Das Sarma, Emil Talpes |
2022-08-09 |
|
| 11403069 |
Accelerated mathematical engine |
Kevin A. Hurd, Emil Talpes |
2022-08-02 |
|
| 11157441 |
Computational array microprocessor system using non-consecutive data formatting |
Emil Talpes, William McGee |
2021-10-26 |
|
| 11157287 |
Computational array microprocessor system with variable latency memory access |
Emil Talpes, Kevin A. Hurd |
2021-10-26 |
|
| 11132245 |
System and method for handling errors in a vehicle neural network processor |
Christopher Hsiong, Emil Talpes, Debjit Das Sarma, Kevin A. Hurd, Benjamin Floering |
2021-09-28 |
|
| 10747844 |
Systems and methods for converting a matrix input to a vectorized input for a matrix processor |
William McGee, Emil Talpes |
2020-08-18 |
|
| 10715175 |
Systems and methods for encoding and decoding |
Kevin A. Hurd |
2020-07-14 |
|
| 10671349 |
Accelerated mathematical engine |
Kevin A. Hurd, Emil Talpes |
2020-06-02 |
|
| 10606678 |
System and method for handling errors in a vehicle neural network processor |
Christopher Hsiong, Emil Talpes, Debjit Das Sarma, Kevin A. Hurd, Benjamin Floering |
2020-03-31 |
|
| 10416899 |
Systems and methods for low latency hardware memory management |
Kevin A. Hurd, Emil Talpes |
2019-09-17 |
|
| 9354886 |
Maintaining the integrity of an execution return address stack |
Ramesh Gunna, Andrew J. Beaumont-Smith |
2016-05-31 |
$63,912,000 |
| 9280352 |
Lookahead scanning and cracking of microcode instructions in a dispatch queue |
Ramesh Gunna, Rajat Goel |
2016-03-08 |
$72,237,000 |
| 9009451 |
Instruction type issue throttling upon reaching threshold by adjusting counter increment amount for issued cycle and decrement amount for not issued cycle |
Daniel C. Murray, Andrew J. Beaumont-Smith, John H. Mylius, Toshi Takayanagi, Jung Wook Cho |
2015-04-14 |
$82,451,000 |
| 8566528 |
Combining write buffer with dynamically adjustable flush metrics |
Andrew J. Beaumont-Smith, Ramesh Gunna, Wei-Han Lien, Brian P. Lilly, Jaidev P. Patwardhan +2 more |
2013-10-22 |
$104,740,000 |
