Patent Leaderboard
USPTO Patent Rankings Data through Dec 31, 2025
Home › Reducing chiplet wakeup latency

Reducing chiplet wakeup latency

US Patent 10656696 · Granted May 19, 2020

Estimated economic value: $54,061,000 ⓘ

Assignee

Inventors

View full patent text on Google Patents →

More Patents by These Inventors

Arbitrated interrupt steering in heterogeneous processors2025
Systems and methods for serialized initialization circuitry2025
Memory power performance state optimization during image display2025
Method of task transition between heterogenous processors2025
Reduced mesh lane routing2025
On-demand regulation of memory bandwidth utilization to service requirements of 2025
Low power memory state during non-idle processor state2025
Shadow tag management for accelerator partitions2025
Mechanism for performing distributed power management of a multi-GPU system by p2025
System-wide low power management2025
System-wide low power management2025
System and method for controlling power consumption in processor using interconn2025