Patent Leaderboard
USPTO Patent Rankings Data through Dec 31, 2025
Home › Low power memory state during non-idle processor state

Low power memory state during non-idle processor state

US Patent 12423006 · Granted Sep 23, 2025

Assignee

Inventors

View full patent text on Google Patents →

More Patents by These Inventors

Arbitrated interrupt steering in heterogeneous processors2025
Memory power performance state optimization during image display2025
Method of task transition between heterogenous processors2025
Reduced mesh lane routing2025
On-demand regulation of memory bandwidth utilization to service requirements of 2025
Mechanism for performing distributed power management of a multi-GPU system by p2025
System-wide low power management2025
Dynamically controlled cache rinsing2025
Scheduling training of an inter-chiplet interface2025
Running average cache hit rate2025
Secure and power efficient audio data processing2025
Dynamic buffer management in multi-client token flow control routers2025