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USPTO Patent Rankings Data through Dec 31, 2025
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Benjamin T. Sander — 41 Patents

AMD: 45 patents #174 of 9,280Top 2%
Globalfoundries: 1 patents #2,221 of 4,424Top 55%
LCLipton, Division Of Conopco: 1 patents #102 of 267Top 40%
Austin, TX: #646 of 18,064 inventorsTop 4%
Texas: #2,412 of 125,132 inventorsTop 2%
Overall (All Time): #75,001 of 4,157,543Top 2%
41 Patents All Time
Benjamin T. Sander has been granted 41 US patents while listed as an inventor at AMD. The first was granted in 2000 and the most recent in April 2025. Benjamin T. Sander ranks #75,001 of 4,157,543 US inventors in our database (top 1.8%). Patent records list Benjamin T. Sander in Austin, TX, US.

Issued Patents All Time

Showing 1–25 of 41 patents

Patent #TitleCo-InventorsDateApprox Value ⓘ
12265908 Methods for increasing cache hit rates for neural networks Swapnil P. Sakharshete, Ashish Panday 2025-04-01
12032487 Access log and address translation log for a processor Mark Fowler, Anthony Asaro, Gongxian Jeffrey Cheng, Michael Mantor 2024-07-09 $258,431,000
11288205 Access log and address translation log for a processor Mark Fowler, Anthony Asaro, Gongxian Jeffrey Cheng, Mike Mantor 2022-03-29 $428,407,000
11100004 Shared virtual address space for heterogeneous processors Gongxian Jeffrey Cheng, Mark Fowler, Philip J. Rogers, Anthony Asaro, Mike Mantor +1 more 2021-08-24 $222,257,000
10467138 Caching policies for processing units on multiple sockets Paul Blinzer, Ali Ibrahim, Vydhyanathan Kalyanasundharam 2019-11-05 $31,380,000
10423354 Selective data copying between memory modules Philip J. Rogers, Anthony Asaro, Gongxian Jeffrey Cheng 2019-09-24 $65,614,000
10255104 System call queue between visible and invisible computing devices Michael Clair Houston, Keith Lowery, Newton Cheung 2019-04-09 $34,923,000
10146575 Heterogeneous enqueuing and dequeuing mechanism for task scheduling Michael Clair Houston, Newton Cheung, Keith Lowery 2018-12-04 $15,683,000
9910788 Cache access statistics accumulation for cache line replacement selection Philip J. Rogers, Anthony Asaro 2018-03-06 $9,001,000
9645854 Dynamic work partitioning on heterogeneous processing devices Michael Clair Houston, Newton Cheung, Keith Lowery 2017-05-09 $10,322,000
9501269 Automatic source code generation for accelerated function calls Gregory P. Rodgers, Shreyas Ramalingam 2016-11-22 $8,427,000
9430281 Heterogeneous enqueuing and dequeuing mechanism for task scheduling Michael Clair Houston, Newton Cheung, Keith Lowery 2016-08-30 $3,218,000
8752064 Optimizing communication of system call requests Michael Clair Houston, Newton Cheung, Keith Lowery 2014-06-10 $3,265,000
8667201 Computer system interrupt handling Michael Clair Houston, Newton Cheung, Keith Lowery 2014-03-04 $1,501,000
8667225 Store aware prefetching for a datastream Bharath Narasimha Swamy, Swamy Punyamurtula 2014-03-04 $1,501,000
8195887 Processor power management and method William A. Hughes, Kiran Bondalapati, Vydhyanathan Kalyanasundharam, Kevin M. Lepak 2012-06-05 $2,975,000
7937569 System and method for scheduling operations using speculative data operands Brian D. McMinn 2011-05-03 $12,826,000
7685406 Determination of current stack pointer value using architectural and speculative stack pointer delta values Christopher B. Svec, Faisal A. Syed, Michael E. Tuuk, Gregory W. Smaus 2010-03-23 $14,101,000
7373484 Controlling writes to non-renamed register space in an out-of-order execution microprocessor Arun Radhakrishnan, Michael Filippo, Michael T. Clark, David E. Kroesche 2008-05-13 $15,194,000
7363470 System and method to prevent in-flight instances of operations from disrupting operation replay within a data-speculative microprocessor Michael Filippo, James K. Pickett 2008-04-22 $9,226,000
7315935 Apparatus and method for port arbitration in a register file on the basis of functional unit issue slots Mitchell Alsup, Brian D. McMinn, David E. Kroesche 2008-01-01
7266673 Speculation pointers to identify data-speculative operations in microprocessor Michael Filippo, James K. Pickett 2007-09-04 $16,316,000
7263600 System and method for validating a memory file that links speculative results of load operations to register values Krishnan V. Ramani, Ramsey W. Haddad, Mitchell Alsup 2007-08-28 $7,142,000
7222226 System and method for modifying a load operation to include a register-to-register move operation in order to forward speculative load results to a dependent operation Kevin M. Lepak, James K. Pickett 2007-05-22 $14,345,000
7197630 Method and system for changing the executable status of an operation following a branch misprediction without refetching the operation Mitchell Alsup 2007-03-27 $8,823,000