Issued Patents All Time
Showing 25 most recent of 43 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 10983755 | Transcendental calculation unit apparatus and method | — | 2021-04-20 |
| 10761806 | Transcendental calculation unit apparatus and method | — | 2020-09-01 |
| 10635439 | Efficient interface and transport mechanism for binding bindless shader programs to run-time specified graphics pipeline configurations and objects | David C. Tannenbaum, Derek J. Lentz, Srinivasan S. Iyer, Christopher James Goodman | 2020-04-28 |
| 10496578 | Central arbitration scheme for a highly efficient interconnection topology in a GPU | David C. Tannenbaum, Srinivasan S. Iyer | 2019-12-03 |
| 10360034 | System and method for maintaining data in a low-power structure | David C. Tannenbaum, Srinivasan S. Iyer | 2019-07-23 |
| 10061592 | Architecture and execution for efficient mixed precision computations in single instruction multiple data/thread (SIMD/T) devices | Maxim Lukyanov, Alexander Grosul, Boris Beylin | 2018-08-28 |
| 9727341 | Control flow in a thread-based environment without branching | Yang Jiao, Boris Beylin, Maxim Lukyanov, Alexander Grosul | 2017-08-08 |
| 9483264 | Trace-based instruction execution processing | Boris Beylin, Michael C. Shebanow, SungSoo Park | 2016-11-01 |
| 9471305 | Micro-coded transcendental instruction execution | — | 2016-10-18 |
| 8069336 | Transitioning from instruction cache to trace cache on label boundaries | Gregory W. Smaus | 2011-11-29 |
| 7882330 | Virtualizing an IOMMU | Michael Haertel, Mark Hummel, Andrew W. Lueck, Geoffrey S. Strongin | 2011-02-01 |
| 7809923 | Direct memory access (DMA) address translation in an input/output memory management unit (IOMMU) | Mark Hummel, Geoffrey S. Strongin, Michael Haertel, Andrew W. Lueck | 2010-10-05 |
| 7694110 | System and method of implementing microcode operations as subroutines | Gregory W. Smaus | 2010-04-06 |
| 7653803 | Address translation for input/output (I/O) devices and interrupt remapping for I/O devices in an I/O memory management unit (IOMMU) | Mark Hummel, Geoffrey S. Strongin, Michael Haertel, Andrew W. Lueck | 2010-01-26 |
| 7636819 | Method for proactive synchronization within a computer system | — | 2009-12-22 |
| 7627722 | Method for denying probes during proactive synchronization within a computer system | — | 2009-12-01 |
| 7613898 | Virtualizing an IOMMU | Michael Haertel, Mark Hummel, Geoffrey S. Strongin, Andrew W. Lueck | 2009-11-03 |
| 7606985 | Augmented instruction set for proactive synchronization within a computer system | — | 2009-10-20 |
| 7555633 | Instruction cache prefetch based on trace cache eviction | Gregory W. Smaus | 2009-06-30 |
| 7552290 | Method for maintaining atomicity of instruction sequence to access a number of cache lines during proactive synchronization within a computer system | — | 2009-06-23 |
| 7548999 | Chained hybrid input/output memory management unit | Michael Haertel, Mark Hummel, Geoffrey S. Strongin, Andrew W. Lueck | 2009-06-16 |
| 7543131 | Controlling an I/O MMU | Mark Hummel, Andrew W. Lueck, Geoffrey S. Strongin, Michael Haertel | 2009-06-02 |
| 7516247 | Avoiding silent data corruption and data leakage in a virtual environment with multiple guests | Mark Hummel, Andrew W. Lueck, Geoffrey S. Strongin, Michael Haertel | 2009-04-07 |
| 7480784 | Ensuring deadlock free operation for peer to peer traffic in an input/output memory management unit (IOMMU) | Mark Hummel, Michael Haertel, Andrew W. Lueck, William A. Hughes, Geoffrey S. Strongin | 2009-01-20 |
| 7315935 | Apparatus and method for port arbitration in a register file on the basis of functional unit issue slots | Brian D. McMinn, Benjamin T. Sander, David E. Kroesche | 2008-01-01 |