| 8612975 |
World switch between virtual machines with selective storage of state information |
Benjamin C. Serebrin |
2013-12-17 |
| 8561060 |
Processor and method configured to determine an exit mechanism using an intercept configuration for a virtual machine |
Benjamin C. Serebrin |
2013-10-15 |
| 8135935 |
ECC implementation in non-ECC components |
R. Stephen Polzin, Andrej Kocev, Maurice B. Steinman |
2012-03-13 |
| 8078792 |
Separate page table base address for minivisor |
Benjamin C. Serebrin |
2011-12-13 |
| 8051248 |
Transient transactional cache |
Michael U. Frank, David Leibs |
2011-11-01 |
| 7882330 |
Virtualizing an IOMMU |
Mark Hummel, Andrew W. Lueck, Geoffrey S. Strongin, Mitchell Alsup |
2011-02-01 |
| 7809923 |
Direct memory access (DMA) address translation in an input/output memory management unit (IOMMU) |
Mark Hummel, Geoffrey S. Strongin, Mitchell Alsup, Andrew W. Lueck |
2010-10-05 |
| 7653803 |
Address translation for input/output (I/O) devices and interrupt remapping for I/O devices in an I/O memory management unit (IOMMU) |
Mark Hummel, Geoffrey S. Strongin, Mitchell Alsup, Andrew W. Lueck |
2010-01-26 |
| 7613898 |
Virtualizing an IOMMU |
Mark Hummel, Geoffrey S. Strongin, Andrew W. Lueck, Mitchell Alsup |
2009-11-03 |
| 7548999 |
Chained hybrid input/output memory management unit |
Mark Hummel, Geoffrey S. Strongin, Andrew W. Lueck, Mitchell Alsup |
2009-06-16 |
| 7543131 |
Controlling an I/O MMU |
Mark Hummel, Andrew W. Lueck, Geoffrey S. Strongin, Mitchell Alsup |
2009-06-02 |
| 7516247 |
Avoiding silent data corruption and data leakage in a virtual environment with multiple guests |
Mark Hummel, Andrew W. Lueck, Geoffrey S. Strongin, Mitchell Alsup |
2009-04-07 |
| 7480784 |
Ensuring deadlock free operation for peer to peer traffic in an input/output memory management unit (IOMMU) |
Mark Hummel, Andrew W. Lueck, Mitchell Alsup, William A. Hughes, Geoffrey S. Strongin |
2009-01-20 |
| 7466720 |
Flexible architecture for SONET and OTN frame processing |
Ole Bentz, I. Claude Denton |
2008-12-16 |
| 6925550 |
Speculative scheduling of instructions with source operand validity bit and rescheduling upon carried over destination operand invalid bit detection |
Eric Sprangle, David J. Sager |
2005-08-02 |
