Issued Patents All Time
Showing 1–24 of 24 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 11366511 | Distribution of tasks among asymmetric processing elements | Herbert Hum, Doug Carmean, Rajesh Kumar | 2022-06-21 |
| 11054890 | Distribution of tasks among asymmetric processing elements | Herbert Hum, Doug Carmean, Rajesh Kumar | 2021-07-06 |
| 10437320 | Distribution of tasks among asymmetric processing elements | Herbert Hum, Doug Carmean, Rajesh Kumar | 2019-10-08 |
| 10409360 | Distribution of tasks among asymmetric processing elements | Herbert Hum, Doug Carmean, Rajesh Kumar | 2019-09-10 |
| 10386915 | Distribution of tasks among asymmetric processing elements | Herbert Hum, Doug Carmean, Rajesh Kumar | 2019-08-20 |
| 10181171 | Sharing resources between a CPU and GPU | Matt Craighead, Chris Goodman, Belliappa Kuttanna | 2019-01-15 |
| 9939882 | Systems and methods for migrating processes among asymmetrical processing cores | Herbert Hum, Doug Carmean, Rajesh Kumar | 2018-04-10 |
| 9910483 | Distribution of tasks among asymmetric processing elements | Herbert Hum, Doug Carmean, Rajesh Kumar | 2018-03-06 |
| 9874926 | Distribution of tasks among asymmetric processing elements | Herbert Hum, Douglas M. Carmean, Rajesh Kumar | 2018-01-23 |
| 9870046 | Distribution of tasks among asymmetric processing elements | Herbert Hum, Doug Carmean, Rajesh Kumar | 2018-01-16 |
| 9829965 | Distribution of tasks among asymmetric processing elements | Herbert Hum, Douglas M. Carmean, Rajesh Kumar | 2017-11-28 |
| 9792115 | Super multiply add (super MADD) instructions with three scalar terms | Jesus Corbal, Andrew T. Forsyth, Thomas D. Fletcher, Lisa K. Wu | 2017-10-17 |
| 9760162 | Distribution of tasks among asymmetric processing elements | Herbert Hum, Doug Carmean, Rajesh Kumar | 2017-09-12 |
| 9753530 | Distribution of tasks among asymmetric processing elements | Herbert Hum, Douglas M. Carmean, Rajesh Kumar | 2017-09-05 |
| 9170955 | Providing extended cache replacement state information | Andrew T. Forsyth, Ramacharan Sundararaman, John Cruz Mejia, Douglas M. Carmean, Edward T. Grochowski +1 more | 2015-10-27 |
| 9110655 | Performing a multiply-multiply-accumulate instruction | — | 2015-08-18 |
| 8933946 | Mechanism for effectively handling texture sampling | — | 2015-01-13 |
| 8930722 | Distribution of tasks among asymmetric processing elements | Doug Carmean, Rajesh Kumar | 2015-01-06 |
| 8683183 | Performing a multiply-multiply-accumulate instruction | — | 2014-03-25 |
| 8669990 | Sharing resources between a CPU and GPU | Matthew J. Craighead, Chris Goodman, Belliappa Kuttanna | 2014-03-11 |
| 8615647 | Migrating execution of thread between cores of different instruction set architecture in multi-core processor and transitioning each core to respective on / off power state | Herbert Hum, Doug Carmean, Rajesh Kumar | 2013-12-24 |
| 8533436 | Adaptively handling remote atomic execution based upon contention prediction | Joshua B. Fryman, Edward T. Grochowski, Toni Juan, Andrew T. Forsyth, John Cruz Mejia +3 more | 2013-09-10 |
| 8478969 | Performing a multiply-multiply-accumulate instruction | — | 2013-07-02 |
| 6925550 | Speculative scheduling of instructions with source operand validity bit and rescheduling upon carried over destination operand invalid bit detection | Michael Haertel, David J. Sager | 2005-08-02 |